Bias circuit based on BiFET technology for supplying a bias current to an RF power amplifier

A bias circuit for supplying a bias current to an RF power amplifier, said bias circuit comprising:

• a first bipolar transistor, wherein the emitter terminal of the first bipolar transistor is electrically coupled to the RF power amplifier for supplying a bias current to the RF power amplifier;
• a second bipolar transistor, for outputting a first voltage at the collector terminal of the second bipolar transistor for biasing the base terminal of the first bipolar transistor;
• and
• a first depletion-mode field-effect transistor, wherein the collector terminal of the second bipolar transistor is electrically coupled to the base terminal of the first bipolar transistor via a conductive path comprising the first depletion-mode field-effect transistor for providing a second voltage at the base terminal of the first bipolar transistor, wherein the voltage at the gate terminal of the first depletion-mode field-effect transistor is capable of being controlled by a logic control signal for turning on or turning off the first depletion-mode field-effect transistor, wherein when the first depletion-mode field-effect transistor is on, the base terminal of the first bipolar transistor is biased at the second voltage so as to generate the bias current to the RF power amplifier through the emitter terminal of the first bipolar transistor, wherein the first bipolar transistor, the second bipolar transistor and the first depletion-mode field-effect transistor are integrated on a single-chip integrated circuit.

A bias circuit for supplying a bias current to an RF power amplifier, said bias circuit comprising:

• a first bipolar transistor, wherein the emitter terminal of the first bipolar transistor is electrically coupled to the RF power amplifier for supplying a bias current to the RF power amplifier;
• a second bipolar transistor, for outputting a first voltage at the collector terminal of the second bipolar transistor for biasing the base terminal of the first bipolar transistor;
• and
• a first field-effect transistor, wherein the collector terminal of the second bipolar transistor is electrically coupled to the base terminal of the first bipolar transistor for providing a second voltage at the base terminal of the first bipolar transistor, wherein the voltage at the gate terminal of the first field-effect transistor is capable of being controlled by a logic control signal for turning on or turning off the first field-effect transistor, wherein when the first field-effect transistor is on, the base terminal of the first bipolar transistor is biased at the second voltage so as to generate the bias current to the RF power amplifier through the emitter terminal of the first bipolar transistor, wherein the first bipolar transistor, the second bipolar transistor and the first field-effect transistor are integrated on a single-chip integrated circuit, wherein the collector terminal of the second bipolar transistor is electrically coupled to the base terminal of the first bipolar transistor via a conductive path comprising a resistor, wherein the collector terminal of the second bipolar transistor is electrically coupled to the base terminal of the second bipolar transistor via the first field-effect transistor for providing said second voltage at the base terminal of the first bipolar transistor.