Self-aligned internal spacer with EUV

A method of forming aligned gates for horizontal nanowires or nanosheets, the method comprising:

• providing a wafer comprising a semiconductor structure which comprises at least one fin, the at least one fin comprising a stack of sacrificial layers alternated with functional layers, the semiconductor structure comprising a dummy gate covering a section of the fin between a first end of the section and a second end of the section,
• at least partly removing the stack of sacrificial layers in between the functional layers, at the first end and the second end of the section thereby forming a void between the functional layers at the first end of the section and a void at the second end of the section such that the void at the first end is partly covered by the dummy gate and such that the void at the second end is partly covered by the dummy gate,
• after at least partly removing the stack of sacrificial layers, providing a resist material within the void at the first end of the section and within the void at the second end of the section, wherein the resist material is selected such that it oxidizes upon exposure to extreme ultraviolet (EUV) light,
• exposing the wafer to EUV light thereby converting an exposed part of the resist material that is not under the dummy gate to an oxide, wherein an unexposed part of the resist material is under the dummy gate,
• selectively removing the dummy gate and the unexposed resist material,
• forming a gate between the functional layers and between the exposed resist material at the first end and the exposed resist material at the second end of the section, thus obtaining aligned gates for the functional layers wherein the functional layers are corresponding with the nanowires or nanosheets.