Pulse amplitude modulation-3 transceiver and operation method thereof

A Pulse Amplitude Modulation 3 (PAM-3) system comprising a PAM-3 signaling device and a receiver terminal, the device comprising:

• an encoder configured to:
• select one of first to ninth transitions in first and second unit intervals that are successive,
• map data of three bits by using the remaining eight transitions other than the one selected among the first to ninth transitions;
• and
• an output driver configured to:
• receive an output signal of the encoder via an input,
• generate a multi-level signal having an output voltage of first to third levels,
• wherein the data of three bits are transmitted to the receiver terminal through the multi-level signal having the output voltage of the first to third levels during the first and second unit intervals that are successive,
• wherein the one selected among the first to ninth transitions is used to detect a windowing phenomenon at the receiver terminal receiving the multi-level signal,
• wherein the multi-level signal is recovered to an original 3-bit signal at the receiver terminal through decoding logic of four half-rate reference comparators and a decoder, and
• wherein the receiver terminal inverts sampling clock phases of the four comparators and the decoder by 180 degrees when a signal having the one transition selected among the first to ninth transitions is detected.

A pulse amplitude modulation-3 (PAM-3) signaling method, the method comprising:

• selecting, by an encoder, one of first to ninth transitions in first and second unit intervals that are successive;
• mapping, by the encoder, data of three bits by using the remaining eight transitions other than the one selected among the first to ninth transitions;
• after mapping the data of three bits, outputting the mapped result to a multiplexer electrically connected to the encoder via first to eighth signal lines, the multiplexer selectively outputting four of signals of the first to eighth signal lines at a half rate via first to fourth driver signal lines;
• receiving, by an output driver, a result of mapping the data of three bits via an input;
• and
• generating a multi-level signal having an output voltage of first to third levels based on a signal input from the first to fourth driver signal lines connected to the multiplexer,
• wherein the data of three bits is transmitted to a receiver terminal through the multi-level signal having the output voltage of the first to third levels during the first and second unit intervals that are successive.