Single-line serial data transmission circuit and single-line serial data transmission method

A single-line serial transmission circuit comprising a master circuit and a slave circuit, wherein

• the master circuit includes:
• a data clock adder used in writing transmission data from the master circuit to the slave circuit, and
• a data receiver used in writing reception data from the slave circuit to the master circuit,
• the slave circuit includes:
• a data clock separator used in writing the transmission data from the master circuit to the slave circuit,
• a data transmitter used in writing the reception data from the slave circuit to the master circuit, and
• an active generator, and
• the master circuit and the slave circuit are connected together via a single signal line,
• wherein the slave circuit further includes:
• a signal terminal via which a synthetic signal synthesized from a clock signal and a data signal by the data clock adder is received,
• wherein a control terminal via which the slave circuit is brought into a data accepting state,
• a slave clock terminal, and
• a slave data terminal, and
• an input to the signal terminal is fed as the data signal to the slave data terminal,
• the clock signal generated from the input to the signal terminal is fed to the slave clock terminal, and
• a control signal generated from the input to the signal terminal is fed to the control terminal,
• wherein in the slave circuit,
• the input to the signal terminal is fed as the data signal to the slave data terminal,
• the clock signal generated from the input to the signal terminal via a D flip-flop is fed to the slave clock terminal, and
• the control signal generated from the input to the signal terminal via a delay circuit is fed to the control terminal,
• wherein
• generation of the clock signal becomes possible when the control signal turns to high level, and
• the control signal stabilizes the control signal itself on having turned to high level or low level.

A transmission method for a single-line serial transmission circuit comprising a master circuit and a slave circuit, wherein

• the master circuit includes:
• a data clock adder used in writing transmission data from the master circuit to the slave circuit, and
• a data receiver used in writing reception data from the slave circuit to the master circuit,
• the slave circuit includes:
• a data clock separator used in writing the transmission data from the master circuit to the slave circuit,
• a data transmitter used in writing the reception data from the slave circuit to the master circuit, and
• an active generator, and
• the master circuit and the slave circuit are connected together via a single signal line, wherein
• communication starts at a fall of a synthetic signal synthesized from a clock signal and a data signal by the data clock adder,
• when the synthetic signal stays at low level for a predetermined time, a control signal generated from the synthetic signal turns to high level to bring the slave circuit into an accepting state,
• a slave clock is extracted a predetermined time after the fall of the synthetic signal,
• data is read at a rise of the slave clock, and
• when the synthetic signal stays at high level for a predetermined time, the control signal turns to low level to bring the slave circuit into a non-accepting state, thereby ending communication.

A slave circuit in communication with a master circuit by means of a single-line serial transmission, the slave circuit comprising:

• a signal terminal configured to receive from the master circuit a synthetic signal for transmitting a transmission data,
• an active generator configured to generate a control signal on the basis of the synthetic signal,
• a data clock generator configured to generate a slave clock signal on the basis of the synthetic signal used in writing the transmission data from the master circuit to the slave circuit,
• a slave data terminal configured to output the transmission data on the basis of the synthetic signal, and
• a data transmitter used in writing the reception data from the slave circuit to the master circuit,
• wherein the master circuit and the slave circuit are connected together via a single signal line through which the synthetic signal is transmitted to the signal terminal from the master circuit.