US 10,897,267 B1 · Multi-output digital to analog converter

Abstract

A circuit includes a first voltage divider having a set of most significant bit (MSB) outputs each representative of a value of a MSB portion of a digital code. The circuit also includes a second voltage divider having a first upper voltage input configured to couple to a first one of a first pair of outputs of the set of MSB outputs, and a first lower voltage input configured to couple to a second one of the first pair of outputs of the set of MSB outputs. The circuit also includes a third voltage divider having a second upper voltage input configured to couple to a first one of a second pair of outputs of the set of MSB outputs, and a second lower voltage input configured to couple to a second one of the second pair of outputs of the set of MSB outputs.

Claims20

Dependent claims

A circuit, comprising:

a first voltage divider having a set of most significant bit (MSB) outputs each representative of a value of a MSB portion of a digital code;
a second voltage divider comprising:
a first upper voltage input configured to couple to a first one of a first pair of outputs of the set of MSB outputs;
and
a first lower voltage input configured to couple to a second one of the first pair of outputs of the set of MSB outputs;
and
a third voltage divider comprising:
a second upper voltage input configured to couple to a first one of a second pair of outputs of the set of MSB outputs;
and
a second lower voltage input configured to couple to a second one of the second pair of outputs of the set of MSB outputs.

7 more elements

A circuit, comprising:

a first voltage divider configured to generate a set of most significant bit (MSB) voltages each corresponding to a value of a MSB portion of a digital code;
a second voltage divider configured to divide a first pair of MSB voltages from the set of MSB voltages into a first set of least significant bit (LSB) voltages;
and
a third voltage divider configured to divide a second pair of MSB voltages from the set of MSB voltages into a second set of LSB voltages.

1 more element

A system, comprising:

an upper voltage reference input;
a lower voltage reference input;
a set of most significant bit (MSB) resistors coupled to the upper voltage reference input and the lower voltage reference input, the set of MSB resistors configured to provide a set of MSB voltage outputs based on the upper voltage reference input and the lower voltage reference input;
a first pair of switches;
a first set of least significant bit (LSB) resistors, the first pair of switches configured to couple a first pair of MSB voltage outputs from the set of MSB voltage outputs to the first set of LSB resistors, the first set of LSB resistors configured to provide a first set of LSB voltages based on the first pair of MSB voltages;
a second pair of switches;
and
a second set of least significant bit (LSB) resistors, the second pair of switches configured to couple a second pair of MSB voltage outputs from the set of MSB voltage outputs to the second set of LSB resistors, the second set of LSB resistors configured to provide a second set of LSB voltages based on the second pair of MSB voltages.

5 more elements

Dependencies are inferred from the claim text.

Multi-output digital to analog converter

Life of this patent

Multi-output digital to analog converter

Life of this patent

Abstract

Claims20