Power semiconductor drive circuit, power semiconductor circuit, and power module circuit device
AssigneeRohm Co., Ltd.
InventorsYuji Ishimatsu, Motohiro Ando
Life of this patent
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Abstract
A power semiconductor drive circuit includes a parallel circuit connected to a gate of a power semiconductor element and constituted by two transistors for setting gate resistance of the power semiconductor element; a gate voltage monitoring circuit connected to the gate of the power semiconductor element and the parallel circuit, wherein a monitoring voltage is set in the gate voltage monitoring circuit to monitor a gate voltage of the power semiconductor element; a signal delay circuit to delay an output signal of the gate voltage monitoring circuit; and a gate control circuit to change the magnitude of combined resistance of the parallel circuit based on an output signal output from the signal delay circuit.
Claims21
A power semiconductor drive circuit for driving an upper power semiconductor element and a lower power semiconductor element coupled in series between a power supply terminal and a ground electric potential, the circuit comprising:
- a parallel circuit having a first end which is directly connected to a gate of the upper power semiconductor element and a second end which is connected to a connection point between the upper power semiconductor element and the lower power semiconductor element, and constituted by at least two transistors for setting gate resistance of the upper power semiconductor element;
- a gate voltage monitoring circuit directly connected to the gate of the upper power semiconductor element and the parallel circuit, wherein a predetermined monitoring voltage is set in the gate voltage monitoring circuit in order to monitor a gate voltage of the upper power semiconductor element;
- and
- a gate control circuit to change a magnitude of combined resistance of the parallel circuit based on an output signal of the gate voltage monitoring circuit,
- wherein the at least two transistors are of the same conductivity type, and drain-source conduction paths of the at least two transistors are connected in parallel with each other.
A power semiconductor drive circuit for driving an upper power semiconductor element and a lower power semiconductor element coupled in series between a power supply terminal and a ground electric potential, the circuit comprising:
- a parallel circuit having a first end which is directly connected to a gate of the upper power semiconductor element and a second end which is connected to a connection point between the upper power semiconductor element and the lower power semiconductor element, and constituted by at least two transistors for setting gate resistance of the upper power semiconductor element;
- a gate voltage monitoring circuit directly connected to the gate of the upper power semiconductor element and the parallel circuit, wherein a predetermined monitoring voltage is set in the gate voltage monitoring circuit in order to monitor a gate voltage of the upper power semiconductor element;
- a gate control circuit to change a magnitude of combined resistance of the parallel circuit based on an output signal of the gate voltage monitoring circuit;
- and
- a signal delay circuit to delay the output signal of the gate voltage monitoring circuit,
- wherein the gate control circuit changes the magnitude of combined resistance of the parallel circuit based on an output signal output from the signal delay circuit,
- wherein the combined resistance of the parallel circuit is changed after a delay time set in the signal delay circuit elapses, and
- wherein a predetermined threshold voltage is set in the gate control circuit and wherein the gate control circuit outputs a result of a logical AND operation for a driving signal applied to the gate of the upper power semiconductor element and the output signal output from the signal delay circuit.
Dependencies are inferred from the claim text.