Semiconductor device

A semiconductor device, comprising:

• a delay element;
• a drive circuit which is coupled to the delay element, and controls a first circuit;
• and
• a control circuit which controls the drive circuit,
• wherein the drive circuit includes:
• a first MOS transistor coupled between a first power supply node and the delay element;
• a second MOS transistor having a first conductivity type which is coupled in series to the first MOS transistor, and coupled between the first power supply node and the delay element;
• a third MOS transistor coupled in parallel to the first and second MOS transistors between the first power supply node and the delay element;
• and
• a fourth MOS transistor coupled between a second power supply node and the delay element,
• wherein the control circuit includes:
• a first logic circuit that receives an operation mode signal and a clock signal, an output signal from the first logic circuit being input to the first MOS transistor;
• and
• a second logic circuit which receives the clock signal, an output signal from the second logic circuit being input to the second MOS transistor,
• wherein a threshold voltage of a fifth MOS transistor used in the first logic circuit is not more than a threshold voltage of a sixth MOS transistor used in the second logic circuit,
• wherein, when the operation mode signal is inactive and the clock signal is inactive, the control circuit controls the second MOS transistor into an OFF state and controls the first MOS transistor into the OFF state at least temporarily.