Asymmetric threshold voltages in semiconductor devices

A method of forming a semiconductor device, comprising:

• forming an inner spacer on a semiconductor fin;
• forming two outer spacers around the inner spacer, with one outer spacer being in contact with the inner spacer and with the other outer spacer being separated from the inner spacer by a gap;
• forming a dipole-forming layer on the semiconductor fin in the gap from a material selected from the group consisting of an oxide of an International Union of Pure and Applied Chemistry (IUPAC) group 2 element, an oxide of an IUPAC group 3 element, and titanium oxide;
• etching away the inner spacer;
• and
• forming a gate stack on the semiconductor fin, between the outer spacers, partially over the dipole-forming layer and partially in contact with the semiconductor fin, without the dipole-forming layer intervening.

A semiconductor device, comprising:

• a semiconductor channel;
• a dipole-forming layer on the semiconductor channel that covers less than the full semiconductor channel;
• and
• a gate stack formed over semiconductor channel, with a first portion of the gate stack being formed over the dipole-forming layer and a second portion of the gate stack having no dipole-forming layer under it.