Semiconductor devices
AssigneeSamsung Electronics Co., Ltd.
InventorsWoo-bin Song, Hei-seung Kim, Mirco Cantoro, Sang-woo Lee, Min-hee Cho, Beom-yong Hwang
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Abstract
A semiconductor device includes a channel layer located on a substrate, the channel layer including a conductive oxide, a gate structure located on the channel layer, the gate structure including a gate electrode and gate spacers located on both sidewalls of the gate electrode, and source and drain regions located on both sides of the gate structure in recess regions having a first height from a top surface of the channel layer. The source and drain regions are configured to apply tensile stress to a portion of the channel layer located under the gate structure.
Claims20
A semiconductor device comprising:
- a channel layer located on a substrate, the channel layer comprising a conductive oxide;
- a gate structure located on the channel layer, the gate structure comprising a gate electrode and gate spacers located on both sidewalls of the gate electrode;
- and
- source and drain regions located on both sides of the gate structure in recess regions having a first height from a top surface of the channel layer,
- wherein the source and drain regions are configured to apply tensile stress to a portion of the channel layer located under the gate structure.
A semiconductor device comprising:
- a channel layer located on a substrate, the channel layer comprising a conductive oxide;
- a gate structure located on the channel layer, the gate structure comprising a gate electrode and gate spacers located on both sides of the gate electrode;
- and
- source and drain regions located on both sides of the gate structure in recess regions having a first height from a top surface of the channel layer,
- wherein the source and drain regions partially overlap the gate spacers in a direction perpendicular to a top surface of the substrate.
A semiconductor device comprising:
- a channel layer located on a substrate;
- a gate structure located on the channel layer, the gate structure comprising gate spacers located on both sidewalls of the gate electrode;
- and
- source and drain regions located on both sides of the gate structure in recess regions having a first height from a top surface of the channel layer, the source and drain regions being configured to apply tensile stress to a portion of the channel layer located under the gate structure,
- wherein the channel layer comprises a material expressed by formula RAO3(MO)m,
- wherein R is at least one of scandium (Sc), ytterbium (Yb), lutetium (Lu), and indium (In), A is at least one of gallium (Ga), aluminum (Al), iron (Fe), and indium (In), M is at least one of zinc (Zn) and magnesium (Mg), and m is an integer.
Dependencies are inferred from the claim text.