Edge interconnect self-assembly substrate
AssigneeIndiana Integrated Circuits, LLC
InventorsJason M. Kulick, Tian Lu
Life of this patent
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Abstract
A substrate assembly includes a first microchip including a first interconnecting structure and a second microchip including a second interconnecting structure, wherein the first and second interconnecting structures have keyed complementary, interlocking shapes. The first interconnecting structure is interlocked with the second interconnecting structure. Quilt package nodules on edges of the first and second microchips electrically connect circuitry formed on or supported by the first and second microchips.
Claims13
A substrate assembly comprising:
- a first microchip including a first interconnecting structure, wherein the first interconnecting structure is a tab;
- and
- a second microchip including a second interconnecting structure, wherein the second interconnecting structure is a notch, wherein the tab and the notch have complementary, interlocking shapes;
- wherein the tab is interlocked with the notch, wherein:
- a first material forming a body of the first microchip also forms the tab that includes a distal end and a pair of sides that extend from the body of the first microchip to the distal end of the tab;
- a second material forming a body of the second microchip also forms the notch that includes a pair of sides;
- the tab includes a first electrically conductive quilt package nodule protruding beyond one of the sides of the tab;
- the notch includes a second electrically conductive quilt package nodule protruding beyond one of the sides of the notch;
- and
- the first and second electrically conductive quilt package nodules are in contact with each other.
A substrate assembly comprising:
- a first microchip including a first electrically conductive quilt package nodule that protrudes from a vertical facet of an edge of the first microchip;
- and
- a second microchip including a second electrically conductive quilt package nodule that protrudes from a vertical facet of an edge of the second microchip, wherein the first and second electrically conductive quilt package nodules have complementary, interlocking shapes that mate or interlock with each other spaced from the bodies of the first and second microchips.
A substrate assembly comprising:
- a first microchip including a first interconnecting structure;
- and
- a second microchip including a second interconnecting structure, wherein the first and second interconnecting structures have complementary, interlocking shapes;
- wherein the first interconnecting structure is interlocked with the second interconnecting structure, wherein:
- a first material used to form a body of the first microchip also forms the first interconnecting structure;
- a second material used to form a body of the second microchip also forms the second interconnecting structure;
- the first interconnecting structure comprises in a top surface of the first microchip a first cavity that is spaced from a perimeter of the first microchip;
- and
- the second interconnecting structure comprises a first projection on a side of the second microchip, wherein interlocking the first interconnecting structure and the second interconnecting structure comprises the first projection being inserted in the first cavity.
Dependencies are inferred from the claim text.