High-voltage MOSFET structures

A bonding-pad structure for reducing capacitance to a semiconductor drain-biased substrate of a high-voltage MOSFET, the bonding-pad structure comprising:

• a first dielectric layer on top of the semiconductor substrate;
• a first polysilicon plate on top of the first dielectric layer;
• a second dielectric layer on top of the first polysilicon plate, wherein the first and second dielectric layers encapsulate the first polysilicon plate, thereby electrically isolating the first polysilicon plate from the semiconductor substrate;
• and
• a metal bonding pad directly above the first polysilicon plate and the second dielectric layer, the metal bonding pad electrically isolated from the first polysilicon plate and conductively coupled to a gate of the high-voltage MOSFET, wherein a top surface of the metal bonding pad has an exposed portion to which a bond wire can be bonded,
• wherein the metal bonding pad is conductively coupled, via, at least in part, a metal wire laterally extending therefrom, to a gate of the high-voltage MOSFET.

A bonding-pad structure for reducing capacitance to a semiconductor drain-biased substrate of a high-voltage MOSFET, the bonding-pad structure comprising:

• a first dielectric layer on top of the semiconductor substrate;
• a first polysilicon plate on top of the first dielectric layer;
• a second dielectric layer on top of the first polysilicon plate, wherein the first and second dielectric layers encapsulate the first polysilicon plate, thereby electrically isolating the first polysilicon plate from the semiconductor substrate;
• a metal bonding pad directly above the first polysilicon plate and the second dielectric layer, the metal bonding pad electrically isolated from the first polysilicon plate and conductively coupled to a gate of the high-voltage MOSFET, wherein a top surface of the metal bonding pad has an exposed portion to which a bond wire can be bonded;
• and
• a polyimide film on top of the metal bonding pad, wherein the polyimide film is selectively removed so as to expose a portion of the metal bonding pad to which a bond wire can be bonded.

A bonding-pad structure for reducing capacitance to a semiconductor drain-biased substrate of a high-voltage MOSFET, the bonding-pad structure comprising:

• a first dielectric layer on top of the semiconductor substrate;
• a first polysilicon plate on top of the first dielectric layer;
• a second dielectric layer on top of the first polysilicon plate, wherein the first and second dielectric layers encapsulate the first polysilicon plate, thereby electrically isolating the first polysilicon plate from the semiconductor substrate;
• and
• a metal bonding pad directly above the first polysilicon plate and the second dielectric layer, the metal bonding pad electrically isolated from the first polysilicon plate and conductively coupled to a gate of the high-voltage MOSFET, wherein a top surface of the metal bonding pad has an exposed portion to which a bond wire can be bonded,
• wherein the second dielectric layer includes a borophosphosilicate glass (BPSG).

A method of manufacturing a bonding pad that has a reduced capacitance to a semiconductor drain-biased substrate of a high-voltage MOSFET, the method comprising:

• providing a semiconductor substrate;
• depositing a first dielectric layer on top of the semiconductor substrate;
• depositing a first polysilicon layer on top of the first dielectric layer;
• selectively etching the first polysilicon layer so as to produce a first polysilicon plate;
• depositing a second dielectric layer on top of the first polysilicon plate, wherein the first and second dielectric layers encapsulate the first polysilicon plate, thereby electrically isolating the first polysilicon plate from the semiconductor substrate;
• depositing a metal bonding pad directly above the first polysilicon plate and the second dielectric layer, wherein the metal bonding pad is electrically isolated from the first polysilicon plate;
• conductively coupling the metal bonding pad to a gate of the high-voltage MOSFET;
• and
• depositing a polyimide film on top of the metal bonding pad;
• selectively removing the polyimide film so as to expose a portion of the metal bonding pad to which a bond wire can be bonded;
• depositing a second polysilicon layer on top of the second dielectric layer;
• selectively etching the second polysilicon layer so as to produce a second polysilicon plate;
• conductively coupling the second polysilicon plate to a source of the high-voltage MOSFET;
• and
• depositing a third dielectric layer on top of the second polysilicon plate.