Semiconductor package and antenna module including the same

A semiconductor package comprising:

• a frame having a first through-hole;
• a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface disposed on an opposite side of the active surface, and disposed in the first through-hole of the frame with the active surface facing upwards;
• a first encapsulant encapsulating at least a portion of the semiconductor chip;
• a second encapsulant disposed on a portion of an external side wall of the frame;
• and
• a connection member disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad of the semiconductor chip,
• wherein the frame includes an insulating layer, a wiring layer on upper and lower surfaces of the insulating layer, a first metal layer on an external side wall of the insulating layer, a second metal layer on an internal side wall of the first through-hole, and a via penetrating the upper and lower surfaces of the insulating layer, and
• wherein the first and second encapsulants have different widths on the external side wall of the frame.

An antenna module comprising:

• an antenna substrate including an antenna pattern;
• and
• a semiconductor package disposed on a lower surface of the antenna substrate to be electrically connected to the antenna substrate,
• wherein the semiconductor package includes:
• a frame having a first through-hole;
• a semiconductor chip having an active surface on which a connection pad is disposed and an inactive surface disposed on an opposite side of the active surface, and disposed in the first through-hole of the frame with the active surface facing upwards;
• a first encapsulant encapsulating at least a portion of the semiconductor chip;
• a second encapsulant disposed on a portion of an external side wall of the frame;
• and
• a connection member disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad of the semiconductor chip,
• wherein the frame includes an insulating layer, a wiring layer on upper and lower surfaces of the insulating layer, a first metal layer on an external side wall of the insulating layer that surrounds the insulating layer, a second metal layer on an internal side wall of the first through-hole, and a via penetrating the upper and lower surfaces of the insulating layer.