US 10,896,869 B2Granted

Method of manufacturing a semiconductor device

AssigneeAmkor Technology Singapore Holding Pte. Ltd.

InventorsSiang Miang Yeo, Mohd Hasrul Bin Zulkifli

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Abstract

A method for forming packaged electronic devices includes providing a substrate having pads connected by conductive pad linking portions and semiconductor devices attached to the pads in different orientations. A second substrate is provided having conductive connectors each with a plate portion, a conductive member extending from a side segment of the plate portion, and a connective portion extending from the conductive member distal to the plate portion. The second substrate further has conductive linking portions physically connecting adjoining plate portions together. Each plate portion is attached to one of the semiconductor devices to provide a subassembly. The conductive linking portions are configured to maintain the adjoining plate portions in substantial alignment with the semiconductor devices and to maintain the connective portions is a desired alignment during the plate portion attachment step. A package body is provided to encapsulate the subassembly where bottom surfaces of each connective portion is exposed outside of a major surface of the package body. The method includes separating the encapsulated subassembly to provide the packaged electronic devices such that the separating step severs the conductive linking portions.

Claims20

Dependent claims

A method for forming packaged electronic devices, comprising:

providing a first substrate comprising:
a first pad;
and
a second pad laterally spaced apart from the first pad;
attaching a first semiconductor device to the first pad and a second semiconductor device to the second pad, wherein:
the first semiconductor device has a first orientation on the first pad;
the second semiconductor device has a second orientation on the second pad;
and
the first orientation is different than the second orientation;
providing a second substrate comprising:
a first conductive connector comprising:
a first plate portion;
a first conductive member extending from a first side segment of the first plate portion;
and
a first connective portion attached to the first conductive member distal to
the first side segment of the first plate portion;
a second conductive connector comprising:
a second plate portion;
a second conductive member extending from a first side segment of the second plate portion;
and
a second connective portion attached to the second conductive member distal to the first side segment of the second plate portion;
and
a first conductive linking portion attached at one end to a second side segment of the first plate portion and attached at an opposite end to a second side segment of the second plate portion, wherein the second side segment of the first plate portion is on a different side of the first plate portion than the first side segment of the first plate portion, and wherein the second side segment of the second plate portion is on a different side of the second plate portion than the first side segment of the second plate portion;
connecting the first plate portion to the first semiconductor device and the second plate portion to the second semiconductor device to provide a subassembly;
forming a package body encapsulating the subassembly to provide an encapsulated subassembly, wherein bottom surfaces of the first connective portion and the second connective portion are exposed outside of a major surface of the package body;
and
separating the encapsulated subassembly to provide the packaged electronic devices, wherein separating comprises severing the first conductive linking portion.

24 more elements

A method for forming packaged electronic devices, comprising:

providing a first substrate comprising:
a first pad;
a second pad laterally spaced apart from the first pad;
and
a first conductive linking portion attached at one end to a first edge segment of the first pad and attached at an opposing end to a first edge segment of the second pad;
attaching a first semiconductor device to the first pad and a second semiconductor device to the second pad, wherein:
the first semiconductor device has a first orientation on the first pad;
the second semiconductor device has a second orientation on the second pad;
and
the first orientation is different than the second orientation;
providing a second substrate comprising:
a first conductive connector comprising:
a first plate portion;
a first conductive member extending from a first side segment of the first plate portion;
and
a first connective portion attached to the first conductive member distal to the first side segment of the first plate portion;
a second conductive connector comprising:
a second plate portion;
a second conductive member extending from a first side segment of the second plate portion;
and
a second connective portion attached to the second conductive member distal to the first side segment of the second plate portion;
and
a second conductive linking portion attached at one end to a second side segment of the first plate portion and attached at an opposite end to a second side segment of the second plate portion;
connecting the first plate portion to the first semiconductor device and the second plate portion to the second semiconductor device to provide a subassembly;
forming a package body encapsulating the subassembly to provide an encapsulated subassembly, wherein bottom surfaces of the first connective portion and the second connective portion are exposed outside of a major surface of the package body;
plating a layer of material on portions of the encapsulated subassembly including the bottom surfaces of the first connective portion and the second connective portion, wherein the second conductive linking portion is configured to provide a current path for the step of plating;
and
separating the encapsulated subassembly to provide the packaged electronic devices, wherein separating comprises severing the first conductive linking portion and the second linking portion, wherein part of the first linking portion is exposed in a side surface of the package body.

25 more elements

A method for forming packaged electronic devices, comprising:

providing a first substrate comprising:
a first pad;
a second pad laterally spaced apart from the first pad;
and
a third pad, wherein the first pad is interposed between the second pad and the third pad;
attaching a first semiconductor device to the first pad, a second semiconductor device to the second pad, and a third semiconductor device to the third pad, wherein:
the first semiconductor device has a first orientation on the first pad;
the second semiconductor device has a second orientation on the second pad;
the third semiconductor device having a third orientation on the third pad;
and
the first orientation is different than the second orientation;
providing a second substrate comprising:
a first conductive connector comprising:
a first plate portion;
a first conductive member extending from a first side segment of the first plate portion;
and
a first connective portion attached to the first conductive member distal to the first side segment of the first plate portion;
a second conductive connector comprising:
a second plate portion;
a second conductive member extending from a first side segment of the second plate portion;
and
a second connective portion attached to the second conductive member distal to the first side segment of the second plate portion;
a third conductive connector comprising:
a third plate portion;
a third conductive member extending from a first side segment of the third plate portion;
and
a third connective portion attached to the third conductive member distal to the first side segment of the third plate portion, wherein:
the third connective portion is interconnected with the first connective portion to provide an interconnected structure;
and
a first conductive linking portion attached at one end to a second side segment of the first plate portion and attached at an opposite end to a second side segment of the second plate portion;
connecting the first plate portion to the first semiconductor device, the second plate portion to the second semiconductor device, and the third plate portion to the third semiconductor device to provide a subassembly;
forming a package body encapsulating the subassembly to provide an encapsulated subassembly, wherein bottom surfaces of the first connective portion, the second connective portion, and the third connective portion are exposed outside of a major surface of the package body;
and
separating the encapsulated subassembly to provide the packaged electronic devices, wherein separating comprises severing the first conductive linking portion so that a portion of the first conductive linking portion exposed in a side surface of the package body and severing the interconnected structure.

31 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/869,447Filed 12 Jan 2018
Published: US 2019/0221506 A118 Jul 2019
Granted: 19 Jan 2021
Term ends: Not estimatedThe source records don’t support an estimate.

Classification22 codes

H10W 70/657
Shapes or dispositions of interconnections: on sidewalls or bottom surfaces of the package substrates, interposers or redistribution layers
H10W 70/041
Of leadframes: connecting or disconnecting interconnections to or from leadframes, e.g. connecting bond wires or bumps
H10W 70/048
Of leadframes: mechanical treatments, e.g. punching, cutting, deforming or cold welding
H10W 70/427
Cross-sectional shapes: bent parts