Silicon residue removal in nanosheet transistors
AssigneeInternational Business Machines Corporation
InventorsZhenxing Bi, Thamarai S. Devarajan, Nicolas J. Loubet, Binglin Miao, Muthumanickam Sankarapandian, Charan V. Surisetty, Chun W. Yeung, Jingyun Zhang
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Abstract
A method for forming a nanosheet semiconductor device includes forming a nanosheet stack comprising channel nanosheets. The method includes depositing silicon on the nanosheet stack, the silicon completely filling a space between adjacent channel nanosheets. The method includes etching the silicon. The method includes exposing the nanosheet stack to a gas phase heat treatment.
Claims20
A method for forming a nanosheet semiconductor device, the method comprising:
- forming parallel nanosheet stacks respectively comprising channel nanosheets and interfacial layers formed on each of the channel nanosheets;
- depositing gate dielectric layers on each of the interfacial layers of each of the channel nanosheets;
- forming metal liners directly on each of the gate dielectric layers of each of the channel nanosheets to completely fill spaces between the gate dielectric layers of adjacent channel nanosheets;
- depositing silicon on, between and around the parallel nanosheet stacks;
- etching the silicon;
- exposing the nanosheet stack to a gas phase heat treatment to remove by-products of the etching of the silicon from the metal liners;
- and
- after the gas phase heat treatment, annealing the nanosheet stack at temperatures between, about 400° C. to about 600° C.
A method for forming a nanosheet semiconductor device, the method comprising:
- forming parallel nanosheet stacks respectively comprising channel nanosheets and interfacial layers formed on each of the channel nanosheets;
- depositing gate dielectric layers on each of the interfacial layers of each of the channel nanosheets;
- forming titanium nitride metal liners directly on each of the gate dielectric layers of each of the channel nanosheets to completely fill spaces between the gate dielectric layers of adjacent channel nanosheets;
- depositing silicon on, between and around the parallel nanosheet stacks;
- etching the silicon;
- exposing the nanosheet stack to a gas phase heat treatment to remove by-products of the etching of the silicon from the titanium nitride metal liners;
- and
- after the gas phase heat treatment, annealing the nanosheet stack at temperatures between, about 400° C. to about 600° C.
A method for forming a nanosheet semiconductor device, the method comprising:
- forming parallel nanosheet stacks of the nanosheet semiconductor device respectively comprising channel nanosheets, interfacial layers formed on each of the channel nanosheets, gate dielectric layers deposited on each of the interfacial layers of each of the channel nanosheets, titanium nitride metal liners formed directly on each of the gate dielectric layers of each of the channel nanosheets to completely fill spaces between the gate dielectric layers of adjacent channel nanosheets and amorphous silicon deposited on, between and around the parallel nanosheet stacks;
- etching the amorphous silicon;
- exposing the nanosheet semiconductor device to a gas phase heat treatment to remove by-products of the etching of the amorphous silicon from the titanium nitride metal liners;
- and
- after the gas phase heat treatment, annealing the nanosheet stack at temperatures between, about 400° C. to about 600° C.
Dependencies are inferred from the claim text.