D-MRAM devices and methods for replicating data and read and write operations
AssigneeArm Limited
InventorsAkhilesh Ramlaut Jaiswal, Mudit Bhargava
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Abstract
In a particular implementation, a method of storing dynamic random-access memory (DRAM) data in respective magneto-electric magnetic tunnel junctions (ME-MTJ) of D-MRAM bit-cells of a D-MRAM bit-cell memory array, the method comprising: for each of the D-MRAM bit-cells: writing a first data value in a storage capacitor; and in a first cycle, providing a first voltage to a source line coupled to an ME-MTJ, wherein in response to the storage capacitor storing the first data value, the ME-MTJ is configured to store the first data value if the first voltage generates a voltage difference between first and second terminals of the ME-MTJ.
Claims23
A dynamic-magneto random access memory (D-MRAM) bit-cell device comprising:
- a first access device;
- a selector;
- a storage capacitor;
- and
- a magneto-electric magnetic tunnel junction (ME-MTJ) configured to replicate data stored in the storage capacitor,
- wherein the ME-MTJ comprises a free magnetic layer and an ME-oxide, and wherein the ME-oxide is a material configured to switch the free magnetic layer based on a voltage across first and second ends of the ME-oxide.
A dynamic-magneto random access memory (D-MRAM) bit-cell device comprising:
- a first access device;
- a selector;
- a storage capacitor;
- and
- a magneto-electric magnetic tunnel junction (ME-MTJ) configured to replicate data stored in the storage capacitor, wherein:
- the ME-MTJ further comprises first, second, and third terminals;
- the first terminal is coupled to the storage capacitor;
- the second terminal is coupled to a source line;
- and
- the third terminal is coupled to the selector.
A method of storing dynamic random-access memory (DRAM) data in respective magneto-electric magnetic tunnel junctions (ME-MTJ) of D-MRAM bit-cells of a D-MRAM bit-cell memory array, the method comprising:
- for each of the D-M RAM bit-cells:
- writing a first data value in a storage capacitor of the D-M RAM bit-cell;
- and
- in a first cycle, providing a first voltage to a source line coupled to a ME-MTJ, wherein in response to the storage capacitor storing the first data value, the ME-MTJ is configured to store the first data value if the first voltage generates a voltage difference between first and second terminals of the ME-MTJ.
A method of write operation of dynamic random-access memory (DRAM) data stored into a magneto-electric magnetic tunnel junction (ME-MTJ) of a dynamic-magneto random access memory (D-M RAM) bit-cell of a D-M RAM memory array, the method comprising:
- activating an access transistor of the D-M RAM bit-cell coupled to a storage capacitor and the ME-MTJ, wherein the access transistor is activated by:
- providing a first voltage to a word line coupled to the access transistor;
- providing the first voltage or a second voltage to a bit line coupled to the access transistor;
- in response to providing the first or the second voltages, charging or discharging the storage capacitor;
- and
- in response to providing the first or the second voltages to a source line coupled to the ME-MTJ, storing a data value corresponding to the first voltage in the ME-MTJ.
A method of read operation of data in respective ME-magneto tunnel junction (ME-MTJ) of a plurality of D-M RAM bit-cells in a DRAM memory array, each of the D-MRAM bit-cells having an access transistor, a selector, a storage capacitor, and the ME-MTJ, the method comprising:
- initiating the selector of the DRAM bit-cell, wherein the selector is initiated by:
- providing a voltage to a word line coupled to the selector;
- and
- determining a data value stored on the ME-MTJ coupled to the initiated selector, wherein the data value corresponds to pre-power down DRAM data, and wherein determining the data value comprises:
- sensing, by a sensing circuit, a read current or a read voltage on a source line coupled to ME-MTJ.
Dependencies are inferred from the claim text.