Apparatuses and methods for drivers with reduced noise
AssigneeMicron Technology, Inc.
InventorKazuyuki Morishige
Life of this patent
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Abstract
Embodiments of the disclosure are drawn to apparatuses and methods for drivers with reduced voltage noise. Clock signals may be provided to semiconductor devices, and may be distributed throughout the device. Driven are provided along signal paths within the device which may act as buffers for the clock signals. Each clock signal may be coupled to multiple driver circuits within the driver. Each of the multiple driver circuits may be coupled to a different pair of power supply voltage lines. The driver circuits may all have a similar delay to each other.
Claims20
An apparatus comprising:
- a first conductive element elongated in a first direction;
- a second conductive element elongated in the first direction;
- a third conductive element elongated in the first direction;
- a fourth conductive element elongated in the first direction;
- a first driver circuit positioned between the first conductive element and the second conductive element, wherein the first conductive element and the second conductive element provide a first high voltage and a first low voltage, respectively;
- and
- a second driver circuit positioned between the third conductive element and the fourth conductive element, wherein the third conductive element and the fourth conductive element provide a second high voltage and a second low voltage, respectively, and wherein the first and second driver circuits have respective input terminals coupled in common to a first input signal line and respective output terminals coupled in common to a first output signal line.
An apparatus comprising:
- a first conductive element elongated in a first direction;
- a second conductive element elongated in the first direction;
- a third conductive element elongated in the first direction;
- a fourth conductive element elongated in the first direction;
- a first driver circuit positioned between the first conductive element and the second conductive element;
- a second driver circuit positioned between the third conductive element and the fourth conductive element, wherein the first and second driver circuit have respective input terminals coupled in common to a first input signal line and further have respective output terminals coupled in common to a first output signal line;
- and
- a third driver positioned between the second conductive element and the third conductive element, wherein the third driver has an input terminal coupled to a second input signal line and an output terminal coupled to a second output signal line.
An apparatus comprising:
- a first driver circuit coupled to a first high voltage line and a first low voltage line, wherein the first high voltage line and the first low voltage elongate in a first direction;
- and
- a second driver circuit coupled to a second high voltage line and a second low voltage line, wherein the second high voltage line and the second low voltage elongate in the first direction,
- wherein an input of the first driver circuit is coupled in common with an input of the second driver circuit, and an output of the first driver circuit is coupled in common with an output of the second driver circuit.
An apparatus comprising:
- a first driver circuit coupled to a first high voltage and a first low voltage;
- a second driver circuit coupled to a second high voltage and a second low voltage;
- a third driver circuit coupled to the first high voltage and the first low voltage;
- and
- a fourth driver circuit coupled to the second high voltage and the second low voltage,
- wherein an input of the first driver circuit is coupled in common with an input of the second driver circuit, and an output of the first driver circuit is coupled in common with an output of the second driver circuit, and
- wherein an input of the third driver circuit is coupled in common with an input of the fourth driver circuit, and an output of the third driver circuit is coupled in common with an output of the fourth driver circuit.
A method comprising:
- dividing a clock signal between a first path and a second path;
- providing a first part of the divided clock signal to a first clock driver circuit along the first path and a second part of the divided clock signal to a second clock driver circuit along the second path, wherein the first clock driver circuit provides a first clock signal at a first output and is coupled to a first pair of power supply voltage lines and wherein the second clock driver circuit provides a second clock signal at a second output and is coupled to a second pair of power supply voltage lines;
- and
- combining the first clock signal from the first path and the second clock signal from the second path at a node to which the first and the second outputs are coupled.
Dependencies are inferred from the claim text.