Open page biasing techniques
AssigneeMicron Technology, Inc.
InventorsAngelo Visconti, Andrea Locatelli, Giorgio Servalli
Life of this patent
Estimating the term…
Abstract
Methods, systems, and devices for biasing techniques, such as open page biasing techniques, are described. A memory cell may be accessed during an access phase of an access operation, for example, an open page access operation. An activate pulse may be applied to the memory cell during the access phase. The memory cell may be biased to a non-zero voltage after applying the activate pulse and before a pre-charge phase. The pre-charge phase of the access phase may be initiated after biasing the memory cell to the non-zero voltage.
Claims23
A method, comprising:
- activating a row of memory cells as part of an open page access operation;
- applying, during an access phase of the open page access operation, an activate pulse having a first voltage to a capacitor of a memory cell of the row of memory cells;
- biasing, during a duration of the access phase, the capacitor of the memory cell to a second voltage less than the first voltage, wherein the duration extends from an end of the activate pulse to a start of a pre-charge phase;
- and
- initiating, after biasing the memory cell to the second voltage, the pre-charge phase of the open page access operation.
A method, comprising:
- activating a row of memory cells as part of an open page access operation, wherein the open page access operation is a write operation;
- applying, during an access phase of the open page access operation, an activate pulse having a first voltage to a memory cell of the row of memory cells;
- identifying a state stored in the memory cell as part of the write operation;
- biasing, after applying the activate pulse for a duration of the access phase, the memory cell to a second voltage less than the first voltage, wherein a value of the second voltage is based at least in part on identifying the state;
- and
- initiating, after biasing the memory cell to the second voltage, a pre-charge phase of the open page access operation.
A method, comprising:
- applying, during an access phase of an access operation, a first voltage to a digit line coupled with a memory cell as part of an activate pulse;
- applying, during the access phase, a second voltage to a plate line coupled with the memory cell as part of the activate pulse;
- applying, during a duration of the access phase, a third voltage to the digit line after applying the first voltage to the digit line, wherein the duration extends from an end of the activate pulse to a start of a pre-charge phase, and wherein the third voltage being less than the first voltage;
- applying, during the duration of the access phase, a fourth voltage to the plate line after applying the second voltage to the plate line, the fourth voltage being less than the second voltage;
- and
- initiating the pre-charge phase of the access phase after applying the third voltage to the digit line and the fourth voltage to the plate line.
A method, comprising:
- applying, during an access phase of an access operation, a first voltage as part of an activate pulse to a digit line coupled with a memory cell, wherein the access operation is an open page access operation;
- applying, during the access phase, a second voltage as part of the activate pulse to a plate line coupled with the memory cell;
- applying, during the access phase, a third voltage to the digit line after applying the first voltage to the digit line, the third voltage being less than the first voltage;
- applying, during the access phase a fourth voltage to the plate line after applying the second voltage to the plate line, the fourth voltage being less than the second voltage
- initiating a pre-charge phase of the access phase after applying the third voltage to the digit line and the fourth voltage to the plate line;
- and
- identifying a delay phase between the activate pulse and a pre-charge pulse, wherein accessing the memory cell for the open page access operation is based at least in part identifying the delay phase.
An apparatus, comprising:
- a memory cell coupled with a memory array;
- an access line coupled with the memory cell;
- and
- a controller coupled with the access line and the memory cell, the controller configured to:
- activating a row of memory cells as part of an open page access operation;
- apply, during an access phase of the open page access operation, an activate pulse having a first voltage to a capacitor of the memory cell of the row of memory cells;
- bias, during a duration of the access phase, the capacitor of the memory cell to a second voltage less than the first voltage, wherein the duration extends from an end of the activate pulse to a start of a pre-charge phase;
- and
- initiate, after biasing the memory cell to the second voltage, the pre-charge phase of the open page access operation.
An apparatus, comprising:
- a memory cell coupled with a memory array;
- an access line coupled with the memory cell;
- and
- a controller coupled with the access line and the memory cell, the controller configured to:
- apply, during an access phase of an access operation, a first voltage to a digit line coupled with the memory cell as part of an activate pulse;
- apply, during the access phase, a second voltage to a plate line coupled with the memory cell as part of the activate pulse;
- apply, during a duration of the access phase, a third voltage to the digit line after applying the first voltage to the digit line, wherein the duration extends from an end of the activate pulse to a start of a pre-charge phase, and wherein the third voltage being less than the first voltage;
- apply, during the duration of the access phase a fourth voltage to the plate line after applying the second voltage to the plate line, the fourth voltage being less than the second voltage;
- and
- initiate the pre-charge phase of the access phase after applying the third voltage to the digit line and the fourth voltage to the plate line.
Dependencies are inferred from the claim text.