Memory devices including switch circuit that operates regardless of power supply voltage
AssigneeSamsung Electronics Co., Ltd.
InventorArtur Antonyan
Life of this patent
Estimating the term…
Abstract
A memory device includes a memory cell connected to a bit line and a source line, a read and write circuit configured to read data of the memory cell and/or write data in the memory cell, and a switch circuit configured to receive a selection signal based on a power supply voltage. The switch circuit includes a first switch connected between the bit line and the read and write circuit, a second switch connected between the source line and the read and write circuit, and a switch controller configured to turn on or turn off the first and the second switches based on the selection signal using one of a read voltage and a write voltage that are different from the power supply voltage.
Claims20
A memory device comprising:
- a memory cell connected to a bit line and a source line;
- a read and write circuit configured to read data of the memory cell and/or write data in the memory cell;
- and
- a switch circuit configured to receive a selection signal based on a power supply voltage;
- wherein the switch circuit includes:
- a first switch connected between the bit line and the read and write circuit;
- a second switch connected between the source line and the read and write circuit;
- and
- a switch controller configured to turn on or turn off the first and the second switches based on the selection signal using one of a read voltage and a write voltage that are different from the power supply voltage.
A memory device comprising:
- a memory cell connected to a bit line and a source line;
- and
- a switch circuit, wherein the switch circuit comprises:
- a first terminal connected to the bit line;
- a second terminal connected to the source line;
- a third terminal receiving one of a ground voltage and a write voltage;
- a fourth terminal receiving one of the ground voltage, the write voltage, and a sensing voltage;
- a fifth terminal receiving one of the ground voltage, the write voltage, and a read voltage;
- and
- a sixth terminal receiving a selection signal based on a power supply voltage, and
- wherein the switch circuit is configured to electrically connect the third terminal to the first terminal and electrically connect the fourth terminal to the second terminal based on the selection signal using one of the read voltage and the write voltage that are different from the power supply voltage.
A memory device comprising:
- a memory cell array comprising a first memory cell and a second memory cell;
- a read voltage generator configured to generate a read voltage;
- a write voltage generator configured to generate a write voltage;
- a sense amplifier configured to generate a sensing voltage;
- a first switch circuit configured to electrically connect the sense amplifier to the first memory cell using the read voltage or electrically connect the write voltage generator to the first memory cell using the write voltage responsive to a first selection signal that is based on a power supply voltage;
- and
- a second switch circuit configured to electrically connect the sense amplifier to the second memory cell using the read voltage or electrically connect the write voltage generator to the second memory cell using the write voltage responsive to a second selection signal that is based on the power supply voltage.
Dependencies are inferred from the claim text.