Active matrix substrate and display device including demultiplexer circuit with reduced drive power

An active matrix substrate including a display region including a plurality of pixel regions and a peripheral region located around the display region, the active matrix substrate comprising:

• a substrate;
• a plurality of gate bus lines and a plurality of source bus lines provided on the substrate;
• a source driver arranged in the peripheral region and including a plurality of output terminals;
• a plurality of signal output lines connected respectively to the plurality of output terminals of the source driver;
• and
• a demultiplexer circuit including a plurality of unit circuits supported by the substrate, the demultiplexer circuit being arranged in the peripheral region,
• wherein each of the plurality of unit circuits in the demultiplexer circuit distributes a display signal from one signal output line of the plurality of signal output lines to n source bus lines (n is an integer equal to or more than 2) of the plurality of source bus lines,
• each of the plurality of unit circuits includes
• n branch wiring lines connected to the one signal output line, and
• n switching TFTs connected to the n branch wiring lines, respectively, the n switching TFTs individually performing on/off control of electrical connections between the n branch wiring lines and the n source bus lines,
• the demultiplexer circuit further including a plurality of boost circuits capable of boosting voltages applied to gate electrodes of the n switching TFTs,
• each of the plurality of boost circuit includes
• a set unit configured to perform a set action to precharge a node connected to the gate electrode,
• a boost unit configured to perform a boost action to boost a potential of the node precharged by the set unit, and
• a reset unit configured to perform a reset action to reset the potential of the node,
• the demultiplexer circuit includes a drive signal line connected to the set unit,
• the set unit includes a setting TFT including a gate electrode, a source electrode, and a drain electrode, the drain electrode being connected to the drive signal line and the source electrode being connected to the node,
• when the set unit performs the set action, the drain electrode of the setting TFT is configured to be supplied with a first signal voltage V1 from the drive signal line, and the gate electrode of the setting TFT is configured to be supplied with a second signal voltage V2 higher than the first signal voltage V1, and
• during the set action, the setting TFT is in an on state.