Displays with gate driver circuitry having shared register circuits

A display comprising:

• an array of pixels in an active area of the display, wherein the array of pixels comprises first and second adjacent rows of pixels and wherein each pixel in the array of pixels comprises a plurality of transistors;
• display driver circuitry in an inactive area of the display, wherein the display driver circuitry is configured to provide image data to the pixels;
• and
• gate driver circuitry in the inactive area of the display, wherein the gate driver circuitry comprises a register circuit that is configured to provide a control signal to both a first transistor of the plurality of transistors in the first row of pixels and a second, different transistor of the plurality of transistors in the second row of pixels.

A display comprising:

• an array of pixels in an active area of the display, wherein each pixel in the array of pixels comprises a semiconducting-oxide switching transistor having a gate that receives a first control signal and a silicon switching transistor having a gate that receives a second control signal;
• display driver circuitry in an inactive area of the display, wherein the display driver circuitry is configured to provide image data to the pixels;
• and
• gate driver circuitry in the inactive area of the display, wherein the gate driver circuitry comprises:
• a first shift register that includes a first plurality of register circuits, wherein each register circuit in the first plurality of register circuits provides the first control signal to at least two respective rows of pixels;
• and
• a second shift register that includes a second plurality of register circuits, wherein each register circuit in the second plurality of register circuits provides the second control signal to only one row of pixels.