Handling pipeline submissions across many compute units

A general-purpose graphics processing unit comprising:

• multiple processing elements having a single instruction, multiple thread (SIMT) architecture including hardware multithreading, the multiple processing elements to execute multiple warps of threads, wherein a warp includes a group of parallel threads and execution context is maintained on-chip during execution;
• and
• a scheduler to schedule a set of sub-warps to the multiple processing elements at sub-warp granularity, wherein a sub-warp includes a sub-group of parallel threads, and a warp includes multiple sub-warps.

A method of managing thread execution on a general-purpose graphics processing unit, the method comprising:

• scheduling a warp to multiple processing elements of the general-purpose graphics processing unit at sub-warp granularity, wherein the warp includes a group of parallel threads, the warp includes multiple sub-warps, each sub-warp includes a sub-group of parallel threads, and threads within the warp can diverge at sub-warp granularity;
• and
• grouping active threads from a first sub-warp from a first warp of threads to execute concurrently on the multiple processing elements with active threads of a second sub-warp from a second warp of threads, the multiple processing elements having a single instruction, multiple thread (SIMT) architecture, the multiple processing elements enabled to perform hardware multithreading, wherein execution context for threads executed by the multiple processing elements is maintained on-chip during execution.