Repository of integration description of hardware intellectual property for NoC construction and SoC integration

A non-transitory computer readable medium, storing instructions for managing a repository of hardware intellectual property (IP) for Network-on-Chip (NoC) or System-on-Chip (SoC) construction, said instructions comprising:

• storing, in the repository, one or more integration descriptions of the hardware IP, the one or more integration descriptions comprising information derived from the hardware IP to construct at least an NoC for integration into at least one SoC;
• selecting at least one integration description from said one or more integration descriptions of the hardware IP for incorporation in the NoC or the at least one SoC, wherein the at least one integration description is selected as a parsed selection;
• and
• generating the NoC or the at least one SoC based at least in part on the parsed selection,
• wherein the integration description comprises protocol characteristics, wherein a number of ports of the NOC and capability of each of the ports to receive a specific protocol is to be determined based on user input.