Systems for performing instructions for fast element unpacking into 2-dimensional registers

A processor comprising:

• fetch circuitry to fetch an instruction whose format includes fields to specify an opcode and locations of one or more Structure of Arrays (SOA) source matrices and an Array of Structures (AOS) destination matrix;
• wherein
• the specified opcode is to indicate a move from the specified SOA matrix to the specified AOS matrix;
• the specified SOA source matrices together contain K segregated groups, each containing N same-typed elements, wherein each of the K groups is disposed either in a dedicated matrix or in a shared matrix;
• the AOS destination matrix is to contain N structures each containing K elements of different types, with same-typed elements in consecutive structures separated by a stride;
• decode circuitry to decode the fetched instruction;
• and
• execution circuitry, responsive to the decoded instruction, to sort each element of the specified SOA source matrix into one of the K element type and write each sorted element to its corresponding position in the specified AOS destination matrix.

A method to be performed by a processor, the method comprising:

• fetching, using fetch circuitry, an instruction whose format includes fields to specify an opcode and locations of an Array-of-Structures (AOS) source matrix and one or more Structure of Arrays (SOA) destination matrices, wherein:
• the specified opcode calls for unpacking elements of the specified AOS source matrix into the specified Structure of Arrays (SOA) destination matrices;
• and
• the AOS source matrix is to contain N structures each containing K elements of different types, with same-typed elements in consecutive structures separated by a stride;
• the SOA destination matrices together contain K segregated groups, each containing N same-typed elements, wherein each of the K groups is disposed either in a dedicated matrix or in a shared matrix;
• decoding, using decode circuitry, the fetched instruction;
• and
• responding, using execution circuitry, to the decoded instruction by unpacking each element of the specified AOS matrix into one of the K element type and writing each unpacked element to its corresponding group of same-typed elements in the one or more SOA matrices.

A non-transitory machine-readable medium containing instructions, when executed by a processor, cause the processor to:

• fetch, using fetch circuitry, an instruction whose format includes fields to specify an opcode and locations of one or more Structure of Arrays (SOA) source matrices and an Array of Structures (AOS) destination matrix;
• wherein
• the specified opcode is to indicate a move from the specified SOA matrix to the specified AOS matrix;
• the specified SOA source matrices together contain K segregated groups, each containing N same-typed elements, wherein each of the K groups is disposed either in a dedicated matrix or in a shared matrix;
• and
• the AOS destination matrix is to contain N structures each containing K elements of different types, with same-typed elements in consecutive structures separated by a stride;
• decode, using decode circuitry, the fetched instruction;
• and
• respond, using execution circuitry, to the decoded instruction by sorting each element of the specified SOA source matrix into one of the K element types and write each sorted element to its corresponding position in the specified AOS destination matrix.