US 10,895,774 B2Granted

Array substrate, manufacturing method, display panel and display device

AssigneeBoe Technology Group Co., Ltd.

InventorWei Yang

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Abstract

The present disclosure discloses an array substrate, including a first active layer formed on a substrate; a first gate insulating layer on the substrate and the first active layer; a first gate electrode and a second gate electrode formed on the first gate insulating layer; a second gate insulating layer on the first gate insulating layer and the first and second gate electrodes; a second active layer and second source and drain electrodes formed on the second gate insulating layer, the second source and drain electrodes being electrically connected to the second active layer; an interlayer insulating layer on the second gate insulating layer, the second active layer and the second source and drain electrodes; and first source and drain electrodes formed on the interlayer insulating layer, the first source and drain electrodes being electrically connected to the first active layer.

Claims13

Dependent claims

An array substrate comprising:

a first active layer on a substrate;
a first gate insulating layer on the substrate and the first active layer;
a first gate electrode and a second gate electrode on the first gate insulating layer;
a second gate insulating layer on the first gate insulating layer and the first and second gate electrodes;
a second active layer and second source and drain electrodes on the second gate insulating layer, the second source and drain electrodes being electrically connected to the second active layer;
a conductive layer disposed on the second gate insulating layer and overlapping the first gate electrode with a part of the second active layer interposed therebetween, and the conductive layer and the first gate electrode functioning as electrodes of a capacitor;
an interlayer insulating layer covering the second gate insulating layer, the second active layer, the conductive layer, and the second source and drain electrodes;
first source and drain electrodes formed on the interlayer insulating layer, the first source and drain electrodes being electrically connected to the first active layer;
and
an auxiliary metal portion disposed in a same layer as the first source and drain electrodes on the interlayer insulating layer, the auxiliary metal portion being electrically connected to the second source and drain electrodes,
wherein the interlayer insulating layer is configured to be in contact with a part of an upper surface of the second active layer.

8 more elements

A manufacturing method of an array substrate, comprising:

forming a first active layer on a substrate;
forming a first gate insulating layer on the substrate and the first active layer;
forming a first gate electrode and a second gate electrode on the first gate insulating layer;
forming a second gate insulating layer above the first gate insulating layer and the first and second gate electrodes;
forming a second active layer on the second gate insulating layer;
forming second source and drain electrodes on the second gate insulating layer, the second source and drain electrodes being electrically connected to the second active layer;
forming a conductive layer on the second gate insulating layer, the conductive layer overlapping the first gate electrode with a part of the second active layer interposed therebetween, and the conductive layer and the first gate electrode functioning as electrodes of a capacitor,
forming an interlayer insulating layer covering the second gate insulating layer, the second active layer, the conductive layer, and the second source and drain electrodes;
forming first openings in the interlayer insulating layer, the second gate insulating layer, and the first gate insulating layer, the first openings extending to the first active layer;
cleaning the first active layer through the openings with hydrofluoric acid;
forming a second opening in the interlayer insulating layer, the second opening extending to one of source and drain electrodes;
and
forming first source and drain electrodes and an auxiliary metal on the interlayer insulating layer with a mask, the first source and drain electrodes filling the respective openings and being electrically connected to the first active layer, and the auxiliary metal being electrically connected to the one of the second source and drain electrodes through the second opening,
wherein the interlayer insulating layer is in contact with a part of an upper surface of the second active layer.

11 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/985,876Filed 22 May 2018
Priority: CN 2018 1 00031592 Jan 2018
Published: US 2019/0204668 A14 Jul 2019
Granted: 19 Jan 2021
Term ends: Not estimatedThe source records don’t support an estimate.

Classification17 codes

G02F 1/133514
Filters, e.g. light shielding masks: colour filters
G02F 1/133345
Constructional arrangements; Manufacturing methods: insulating layers
G02F 1/136213
Active matrix addressed cells: storage capacitors associated with the pixel electrode
G02F 1/1368
Active matrix addressed cells: in which the switching element is a three-electrode device