Methods and systems for wafer bonding alignment compensation

A system for bonding wafers, comprising:

• a wafer bonding module configured to bond a first pair of wafers including a first wafer and a second wafer, wherein the first pair of wafers have a plurality of corresponding bonding alignment mark pairs each including a first bonding alignment mark on the first wafer and a second bonding alignment mark on the second wafer;
• an alignment monitoring module configured to measure alignment positions of the plurality of bonding alignment mark pairs;
• a hardware processor configured to determine a mean run-out misalignment between the first pair of wafers using the alignment measurement, wherein the mean run-out misalignment indicates a deformation of at least one of the first pair of wafers;
• and
• a wafer deformation adjustment module configured to compensate the mean run-out misalignment during bonding of a second pair of wafers.

A non-transitory computer-readable medium containing computer-executable instructions that, when executed by a processor, cause the processor to perform a method for wafer bonding alignment compensation, the method comprising:

• bonding a first pair of wafers including a first wafer and a second wafer, wherein the first pair of wafers have a plurality of corresponding bonding alignment mark pairs each including a first bonding alignment mark on the first wafer and a second bonding alignment mark on the second wafer;
• measuring alignment positions of the plurality of bonding alignment mark pairs;
• determining a mean run-out misalignment between the first pair of wafers using the alignment measurement, wherein the mean run-out misalignment indicates a deformation of at least one of the first pair of wafers;
• and
• during bonding of a second pair of wafers, controlling a wafer deformation adjustment module to compensate for the run-out misalignment based on the mean run-out misalignment of the first pair of wafers.