US 10,885,604 B2 · Method for 3D waveform mapping of full-parallel structure

Abstract

The present invention provides a method for 3D waveform mapping of full-parallel structure, first, a 3D waveform mapping database is created according to the size of a 3D waveform image, the number of bits of probability value and the ADC's resolution of data acquisition module, then the 3D waveform mapping database is divided into Mt×Ma independent mapping storage areas along the time axis and the amplitude axis, and each independent mapping storage area is assigned a RAM, then RAMs are selected and addresses are calculated based on the sampling values and the structure of created 3D waveform mapping database, finally, parallel mappings are performed simultaneously on the time axis and the amplitude axis according to the selected RAMs and calculated addresses. Thus, the mapping time are shorten, especially in vector mapping mode, several RAMs are used for mapping, so the WCR of DSO is improved.

A method for 3D waveform mapping of full-parallel structure, comprising:

(1). creating a 3D waveform mapping database, where the size of the 3D waveform mapping database is L×2N×B/8 (byte), L and 2N are respectively the length and the width of a 3D waveform image, B is the number of bits of probability value, N is the ADC's (Analog-to-Digital Converter's) resolution of a data acquisition module;
(2). dividing the 3D waveform mapping database into Mt vertical mapping storage areas along the time axis and Ma horizontal mapping storage areas along the amplitude axis, thus Mt×Ma independent mapping storage areas are obtained, where an independent mapping storage area is represented by Sij, i is the serial number of the independent mapping storage area on the time axis, i=0, 1, . . . , Mt−1, j is the serial number of the independent mapping storage area on the amplitude axis, j=0, 1, . . . , Ma−1;
assigning a random access memory (RAM) for each independent mapping storage area, where the size of the RAM is Wdata×Taddr, Wdata is the bit width of data of the RAM, and Wdata=B, Taddr is the address length of the RAM, and Taddr=(L×2N)/(Mt×Ma), the RAM for independent mapping storage area Sij is represented by Rij;
(3). 3D waveform mapping based on full-parallel structure:
performing step 3.1) or step 3.2)
3.1). point mapping:
3.1.1). initializing serial number k of read to 0;
3.1.2). parallel reading out Mt sampling values from a FIFO memory in which the sampling values acquired by the data acquisition module are stored, then selecting a RAM Rij for each sampling value Ykl, l=0, 1, . . . , Mt−1, according to the following equations:
i=l,j=└Ykl/Ma┘;
where l is the serial number of sampling value Ykl, └ ┘ is the operator of downward rounding;
3.1.3). calculating a physical address Akl for each sampling value Ykl, l=0, 1, . . . , Mt−1 according to the following equation:
A
kl
=
[
2
N
M
a
×
(
k
+
1
)
-
1
]
-
(
Y
kl
⁢
%
⁢
M
a
)
where % is the operator of Mod;
3.1.4). parallel updating the probability values of the storage units for the Mt sampling values:
for each sampling value Ykl, reading out a probability value (initial value is 0) from a storage unit according to physical address Akl in RAM Rij, and adding 1 to the probability value, then writing the added probability value back to the storage unit;
3.1.5). setting serial number k of read to k+1, and returning to step 3.1.2, until L sampling values have been mapped;
3.1.6). returning to step 3.1.1, until a screen refresh signal arrives;
3.2). vector mapping:
3.2.1). initializing serial number k of read to 0;
3.2.2). when in normal sampling mode, parallel reading out Mt sampling values from a FIFO memory in which the sampling values acquired by the data acquisition module are stored, then selecting Mt pairs of maximum values and minimum values Ykl,max, Ykl,min, l=0, 1, . . . , Mt−1, according to the following rules:
{
Y
kl
,
max
=
Y
kl
,
min
=
Y
kl
if
⁢
⁢
l
=
k
=
0
;
Y
kl
,
max
=
max
⁡
(
Y
(
k
-
1
)
⁢
(
M
t
-
1
)
,
Y
kl
)
,
Y
kl
,
min
=
min
⁡
(
Y
(
k
-
1
)
⁢
(
M
t
-
1
)
,
Y
kl
)
if
⁢
⁢
l
=
0
,
k
≥
1
;
Y
kl
,
max
=
max
⁡
(
Y
k
⁡
(
l
-
1
)
,
Y
kl
)
,
Y
kl
,
min
=
min
⁡
(
Y
k
⁡
(
l
-
1
)
,
Y
kl
)
if
⁢
⁢
l
≥
1
;
where l is the serial number of sampling value Ykl, Y(k−1)(Mt−1) is the (Mt−1)th sampling value in (k−1)th read, Yk(l−1) is the (l−1)th sampling value in kth read;
when in extraction mode, parallel reading out Mt groups of sampling values from a FIFO memory in which the sampling values acquired by the data acquisition module are stored, where each group of sampling values has Mext sampling values, Mext is the extracting multiple;
selecting a maximum value and a minimum value from each group of sampling values, where the maximum value and the minimum value are respectively represented by Ykl,max, Ykl,min, l is the serial number of group, l=0, 1, . . . , Mt−1;
and then adjusting Mt pairs of maximum values and minimum values Ykl,max, Ykl,min, l=0, 1, . . . , Mt−1, according to the following rules:
for maximum value Yk(l+1),max, l=0, 1, . . . , Mt−2, if Yk(l+1),max<Ykl,min, then letting Yk(l+1),max=Ykl,min, otherwise keeping it unchanged;
for minimum value Yk(l+1),min, l=0, 1, . . . , Mt−2, if Yk(l+1),min>Ykl,max, then letting Yk(l+1),min=Ykl,max, otherwise keeping it unchanged;
3.2.3). selecting a RAM Rih for each maximum value Ykl,max, a RAM Rig for each minimum value Ykl,min, l=0, 1, . . . , Mt−1, according to the following equations:
i=l,h=└(2N−1−Ykl,max)/Ma┘,g=└(2N−1−Ykl,min)/Ma┘
then selecting RAMs between RAM Rih and RAM Rig for each pair of maximum values and minimum values Ykl,max, Ykl,min;
3.2.4). calculating a physical address Akl,max for each maximum value Ykl,max and a physical address Akl,min for each minimum value Ykl,min, l=0, 1, . . . , Mt−1, according to the following equations:
A
kl
,
max
=
[
2
N
M
a
×
(
k
+
1
)
-
1
]
-
(
Y
kl
,
max
⁢
⁢
%
⁢
⁢
M
a
)
,
⁢
A
kl
,
min
=
[
2
N
M
a
×
(
k
+
1
)
-
1
]
-
(
Y
kl
,
min
⁢
⁢
%
⁢
⁢
M
a
)
3.2.5). parallel updating the probability values of the storage units for the Mt pairs of maximum values and minimum values:
for each pair of maximum value and minimum value Ykl,max, Ykl,min, reading out probability values (initial values are 0) from storage units according to physical address scope [Akl,max, (2N/Ma)×(k+1)−1] in RAM Rih, physical address scope [(2N/Ma)×k, Akl,min] in RAM Rig and physical address scope [(2N/Ma)×k, (2N/Ma)×(k+1)−1] in each RAM between RAM Rih and RAM Rig, and adding 1 to each of the probability values, writing the added probability values back to their respective storage units;
3.2.6). setting serial number k of read to k+1, and returning to step 3.2.2, until L pairs of maximum values and minimum values have been mapped;
3.2.7). returning to step 3.2.1, until a screen refresh signal arrives.

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Method for 3D waveform mapping of full-parallel structure

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Method for 3D waveform mapping of full-parallel structure

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Abstract

Claims2