Method and system for integrated circuit (IC) layout migration integrated with layout expertise

A layout migration system comprising:

• an input for receiving an existing layout file for a first layout of an Integrated Circuit (IC) for a first process using a first set of design rules;
• a layout parser executing on a processor for parsing the existing layout file to identify data items, the data items comprising boundaries of polygons, cell instances, and cell definitions, wherein the cell definitions comprise boundaries of polygons and other cell instances;
• a layout data-item integrator executing on a processor that generates a layout database file stored in a memory, the layout database file comprising the data items identified by the layout parser from the existing layout file;
• a layout design toolkit having placement functions that specify placement locations of data items relative to locations of other data items, the placement locations being a function of a set of design rules;
• an expertise input for receiving reusable code that contains the placement functions;
• a layout expertise integrator executing on a processor that places the reusable code into the layout database file to generate a reusable layout database, wherein the reusable layout database has the reusable code and some of the data items from the layout database file, wherein other data items from the layout database file are replaced by the reusable code;
• and
• a layout generator executing on a processor that compiles the reusable layout database and converts the data items to data item layouts with sizes and spacings that comply with a second set of design rules, and that compiles the reusable code and places data items in second relative locations in response to the placement functions in the reusable code, the second relative locations also complying with the second set of design rules, to generate a second layout file for a second layout of the IC for a second process using the second set of design rules.

A non-transitory computer-readable medium for storing computer-executable instructions, the computer-executable instructions when executed by a processor implementing a method comprising:

• receiving an existing layout file specifying an existing layout;
• parsing the existing layout file for data items that include boundaries of polygons, paths, and instances of cells, wherein a cell contains one or more boundary, path, or instance of another cell;
• writing the data items into a layout database file;
• receiving updated lines of reusable code;
• replacing some data items in the layout database file with the updated lines of reusable code to generate a reusable layout database, wherein the reusable code specifies reusable data items;
• compiling the reusable layout database and using a first set of target design rules to adjust sizes and spacings of layouts of the reusable data items in the reusable layout database to meet the first set of target design rules to generate a first target layout file;
• and
• compiling the reusable layout database and using a second set of target design rules to adjust sizes and spacings of layouts of the reusable data items in the reusable layout database to meet the second set of target design rules to generate a second target layout file;
• wherein a second layout specified by the second target layout file violates the first set of target design rules but does not violate the second set of target design rules;
• wherein the reusable layout database is reused for generating the first target layout file and for generating the second target layout file.