Executing protected code

An electronic device to execute protected code, comprising:

• a processor;
• a first memory region to store boot code accessible by the processor;
• a boot controller;
• and
• a second and a third memory region to store a second boot code and a third boot code that are inaccessible by the processor but that are accessible by the boot controller, wherein the third boot code is a redundant version of the second boot code, the boot controller to, during booting of the electronic device:
• activate a reset signal to the processor to maintain the processor in reset,
• determine an integrity of the boot code in the first memory region,
• in response to the determining indicating that the boot code in the first memory region is invalid:
• validate the second boot code in the second memory region and validate the third boot code in the third memory region;
• cause hardware write locking of the second memory region and the third memory region;
• select randomly the second boot code or the third boot code;
• and
• execute the randomly selected second boot code or third boot code;
• and
• in response to verifying the integrity of the boot code in the first memory region, deactivate the reset signal to allow the processor to execute the boot code in the first memory region.

A non-transitory machine-readable storage medium storing instructions to execute protected code, the instructions upon execution causing an electronic device to:

• in response to a reset of an electronic device, disable hardware write locking of at least a first, second, and third region of a plurality of regions in a non-volatile memory, and execute a first boot code portion from a first region of the plurality of regions to begin a boot procedure;
• check, by the executed first boot code portion, whether an update code for the first boot code portion exists;
• in response to determining that no update code for the first boot code portion exists, cause, by the executed first boot code portion, hardware write locking of the first region;
• after causing the hardware write locking of the first region, validate, by the first code boot portion, a second boot code portion in the second region and validate a redundant version of the second boot code portion in the third region;
• and
• in response to validating the second boot code portion and the redundant version of the second boot code portion;
• cause hardware write locking of the second region and the third region;
• select randomly the second boot code portion or the redundant version of the second boot code portion;
• and
• execute the randomly selected second boot code portion or redundant version of the second boot code portion.