Communication systems with serial peripheral interface functionality
AssigneeAnalog Devices, Inc.
InventorsMartin Kessler, Lewis F. Lahr, William Hooper
Life of this patent
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Abstract
Disclosed herein are systems and techniques for serial peripheral interface (SPI) functionality for node transceivers in a two-wire communication bus. For example, in some embodiments, a node transceiver may include SPI circuitry and upstream or downstream transceiver circuitry. SPI commands received via the SPI circuitry may be executed by the node transceiver, or transmitted upstream or downstream along the two-wire bus for execution by another node transceiver or a slave device coupled to another node transceiver.
Claims20
An apparatus with serial peripheral interface (SPI) functionality, comprising:
- a first node transceiver, wherein the first node transceiver includes transceiver circuitry to receive a signal transmitted over two wires of a two-wire bus from a second node transceiver;
- wherein the first node transceiver further includes SPI circuitry to allow the first node transceiver to act as an SPI slave when the SPI circuitry is coupled to an SPI host.
An apparatus with serial peripheral interface (SPI) functionality, comprising:
- a first node transceiver, wherein the first node transceiver includes transceiver circuitry to receive a signal transmitted over two wires of a two-wire bus from a second node transceiver;
- wherein the second node transceiver includes SPI circuitry to allow the second node transceiver to interface with an SPI host, and the first node transceiver is to act as an SPI slave in response to SPI commands transmitted from the SPI host and over the two-wire bus.
An apparatus with serial peripheral interface (SPI) functionality, comprising:
- a first node transceiver, wherein the first node transceiver includes transceiver circuitry to receive a signal transmitted over two wires of a two-wire bus from a second node transceiver;
- wherein the first node transceiver includes first SPI circuitry to allow the first node transceiver to interface with an SPI slave, the second node transceiver includes second SPI circuitry to allow the second node transceiver to interface with an SPI host, and the SPI slave is to respond to SPI commands transmitted from the SPI host and over the two-wire bus.
Dependencies are inferred from the claim text.