Method and apparatus for using compression to improve performance of low voltage caches
AssigneeAdvanced Micro Devices, Inc.
InventorsJohn Kalamatianos, Shrikanth Ganapathy, Shomit Das, Matthew Tomei
Life of this patent
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Abstract
A method of operating a cache in a computing device includes, in response to receiving a memory access request at the cache, determining compressibility of data specified by the request, selecting in the cache a destination portion for storing the data based on the compressibility of the data and a persistent fault history of the destination portion, and storing a compressed copy of the data in a non-faulted subportion of the destination portion, wherein the persistent fault history indicates that the non-faulted subportion excludes any persistent faults.
Claims18
A method of operating a cache in a computing device, comprising:
- in response to receiving a memory access request at the cache, determining compressibility of data specified by the request;
- selecting in the cache a destination portion for storing the data based on the compressibility of the data and a persistent fault history of the destination portion;
- storing a compressed copy of the data in a non-faulted subportion of the destination portion, wherein the persistent fault history indicates that the non-faulted subportion excludes any persistent faults;
- and
- prior to receiving the memory access request, allocating error protection data for protecting prior data stored in the destination portion;
- and
- in response to storing the compressed copy of the data in the non-faulted subportion of the destination portion, reallocating the error protection data for protecting other data in a different portion of the cache having one or more persistent faults.
A cache device, comprising:
- an input configured to receive a memory access request;
- replacement logic circuitry coupled with the input and a data array of the cache, wherein the replacement logic circuitry is configured to:
- in response to receiving the memory access request at the input, determine compressibility of data specified by the request,
- select in the data array a destination portion for storing the data based on the compressibility of the data and a persistent fault history of the destination portion, and
- store a compressed copy of the data in a non-faulted subportion of the destination portion, wherein the persistent fault history indicates that the non-faulted subportion excludes any persistent faults;
- a compression engine circuit coupled with the replacement logic circuitry and configured to generate the compressed copy of the data;
- and
- control logic circuitry configured to:
- prior to the receiving of the memory access request, allocate error protection data for protecting prior data stored in the destination portion, and
- in response to storing the compressed copy of the data in the non-faulted subportion of the destination portion, reallocating the error protection data for protecting other data in a different portion of the cache having one or more persistent faults.
A computing device, comprising:
- one or more processing cores;
- and
- a set of one or more cache devices, wherein each cache device in the set of one or more cache devices is coupled with a processing core of the one or more processing cores and is configured to:
- in response to receiving a memory access request from the processing core, determine compressibility of data specified by the request;
- select in the cache device a destination portion for storing the data based on the compressibility of the data and a persistent fault history of the destination portion;
- store a compressed copy of the data in a non-faulted subportion of the destination portion, wherein the persistent fault history indicates that the non-faulted subportion excludes any persistent faults;
- prior to the receiving of the memory access request, allocate error protection data for protecting prior data stored in the destination portion;
- and
- in response to storing the compressed copy of the data in the non-faulted subportion of the destination portion, reallocating the error protection data for protecting other data in a different portion of the cache having one or more persistent faults.
Dependencies are inferred from the claim text.