System implementation of one-time programmable memories
AssigneeInternational Business Machines Corporation
InventorsChitra Subramanian, Seiji Munetoh, Ghavam Shahidi
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Abstract
A semiconductor structure includes a first processor on a first die of a substrate. There is a second processor on a second die of the substrate. There is a one-time programmable (OTP) memory programming circuit, outside of the first and second die, and shared by the first and second processors. Each of the first and second processors include a one-time programmable (OTP) memory. The OTP memory programming circuit is configured to program each OTP memory.
Claims19
A processor comprising:
- a core arranged in a first region of a first die;
- a one-time programmable (OTP) memory coupled to the core and arranged on a second region of the first die, wherein OTP memory programming circuits are absent from the first die;
- and
- an OTP memory programming circuit shared among a plurality of processors on different die from the first die but on the same substrate as the first die, wherein each of the plurality of processors includes an OTP memory that has the OTP memory programming circuit absent from its corresponding die.
A semiconductor structure comprising:
- a first processor on a first die of a substrate;
- a second processor on a second die of the substrate;
- and
- an one-time programmable (OTP) memory programming circuit, outside of the first and second die, and shared by the first and second processors, wherein:
- each of the first and second processors include an OTP memory;
- and
- the OTP memory programming circuit is configured to program each OTP memory.
A method of fabricating a plurality of application specific integrated circuits (ASIC), the method comprising:
- fabricating a plurality of processors, each on a different die on a common semiconductor substrate, wherein each of the plurality of processors includes a core, a static memory, and a one-time programmable (OTP) memory;
- fabricating an OTP memory programming circuit on the common semiconductor substrate, outside the die of each of the plurality of processors;
- and
- programming the OTP memory of each of the plurality of processors with the OTP memory programming circuit.
Dependencies are inferred from the claim text.