Error-handling method, associated data storage device and controller thereof

A data storage device, comprising:

• a non-volatile (NV) memory, arranged to store information, wherein the NV memory comprises at least one NV memory element, and the at least one NV memory element comprises a plurality of blocks;
• and
• a controller, coupled to the NV memory, arranged to control operations of the data storage device, wherein the controller comprises:
• a buffer memory, arranged to temporarily store information;
• a transmission interface circuit conforming to a specific communications specification, the transmission interface circuit arranged to perform communications according to the specific communications specification;
• and
• a processing circuit, arranged to control the controller according to a plurality of host commands from a host device, to allow the host device to access the NV memory through the controller, wherein:
• the controller uploads an error-handling program to the buffer memory equipped with error correction code (ECC) protection capability;
• in response to at least one error, the controller interrupts execution of a current procedure and activates an interruption service;
• the controller executes the error-handling program on the buffer memory;
• the controller disables the transmission interface circuit, wherein the transmission interface circuit is arranged to perform communications with the host device;
• the controller resets at least one hardware engine and the at least one NV memory element;
• the controller performs cache rearrangement regarding a data cache within the data storage device, and programs rearranged cache data into the at least one NV memory element, to perform data recovery;
• and
• through activating a watchdog module in the controller, activating the transmission interface circuit, and relinking with the host device, the controller completes soft reset to make the data storage device operate normally again.

A controller of a data storage device that comprises the controller and a non-volatile (NV) memory, the NV memory comprising at least one NV memory element, and the at least one NV memory element comprising a plurality of blocks, wherein the controller comprises:

• a buffer memory, arranged to temporarily store information;
• a transmission interface circuit conforming to a specific communications specification, wherein the transmission interface circuit performs communications according to the specific communications specification;
• and
• a processing circuit, arranged to control the controller according to a plurality of host commands from a host device, to allow the host device to access the NV memory through the controller, wherein:
• the controller uploads an error-handling program to the buffer memory equipped with error correction code (ECC) protection capability;
• in response to at least one error, the controller interrupts execution of a current procedure and activates an interruption service;
• the controller executes the error-handling program on the buffer memory;
• the controller disables the transmission interface circuit, wherein the transmission interface circuit is arranged to perform communications with the host device;
• the controller resets at least one hardware engine and the at least one NV memory element;
• the controller performs cache rearrangement regarding a data cache within the data storage device, and programs rearranged cache data into the at least one NV memory element, to perform data recovery;
• and
• through activating a watchdog module in the controller, activating the transmission interface circuit and relinking with the host device, the controller completes soft reset to make the data storage device operate normally again.