Fast search of error correction code (ECC) protected data in a memory

One or more non-transitory computer-readable storage media comprising a set of instructions for a processor operating a binary content addressable memory (BCAM), wherein the BCAM comprises a number of rows that corresponds to a first plurality of CWs, wherein a row is to store a CW of the first plurality of the CWs, wherein the CW includes a data word and check bits generated by an error correction code (ECC), wherein the row is divided into a third plurality of segments corresponding to a second plurality of sub-BCAMs, wherein the CW to be stored in the row is divided into a fourth plurality of portions corresponding to the third plurality of segments, wherein a sub-BCAM is to store a corresponding portion of the CW, wherein the instructions, when executed on the processor, cause the processor to:

• receive and store a search word, in a search data register (SDR) coupled with the BCAM, wherein the search word includes the data word and the check bits generated by the ECC, wherein the search word is divided into a fifth plurality of portions corresponding to the fourth plurality of portions of the CW;
• generate partial match results between portions of the CWs and corresponding portions of the search word, using matchline sensing logic (MSL), wherein the MSL comprises a sixth plurality of MSL components, wherein an MSL component is coupled with a segment of the third plurality of row segments of the row that is to store the CW, wherein to generate includes to obtain a match or mismatch bit generated by the MSL component in response to a comparison of a corresponding portion of the CW with a corresponding portion of the search word;
• add the partial match results to obtain a sum using a plurality of match counters, wherein a match counter is coupled with the MSL components in the row of BCAM that is to store the CW, wherein the sum includes the matches and mismatches generated by the MSL components of the row of BCAM;
• and
• identify one or more CWs of the first plurality of CWs as a match to the search word, wherein the match indicates that data included in the one or more CW is the same as the data included in the search word.

A computer-implemented method of searching codewords (CWs) in a a binary content addressable memory (BCAM), wherein a CW includes a data word and check bits generated by an error correction code (ECC), wherein the BCAM is divided into a second plurality of segments (sub-BCAMs), wherein the BCAM comprises a number of rows that corresponds to a first plurality of CWs, wherein a row is to store the CW, wherein the row is divided into a third plurality of segments corresponding to the second plurality of sub-BCAMs, wherein the CW to be stored in the row is divided into a fourth plurality of portions corresponding to the third plurality of segments, wherein a sub-BCAM is to store a corresponding portion of the CW, wherein the method comprises:

• receiving and storing, by a processor, a search word, in a search data register (SDR) coupled with the BCAM, wherein the search word includes the data word and the check bits generated by the ECC, wherein the search word is divided into a fifth plurality of portions corresponding to the fourth plurality of portions of the CW;
• generating, by the processor using logic circuitry coupled with the BCAM, partial match results between the portions of the CWs and corresponding portions of the search word, wherein the logic circuitry includes matchline sensing logic (MSL), wherein the MSL comprises a sixth plurality of MSL components, wherein an MSL component is coupled with a segment of the third plurality of row segments of the row that is to store the CW, wherein generating includes obtaining, by the processor, a match or mismatch bit generated by the MSL component in response to a comparison of a corresponding portion of the CW with a corresponding portion of the search word;
• and
• identifying, by the processor using the logic circuitry, one or more CWs as a match of the search word, based, at least in part, on the partial match results, wherein the logic circuitry further includes a plurality of match counters, wherein a match counter is coupled with the MSL components in the row of BCAM that is to store the CW, wherein the identifying includes summing, by the processor, the matches and mismatches generated by the MSL components of the row of BCAM, wherein the match indicates that data included in the one or more CW is the same as the data included in the search word.