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US 10,884,752 B2Granted
Slice-based allocation history buffer
AssigneeInternational Business Machines Corporation
InventorsBrian D. Barrick, Gregory W. Alexander, Dung Q. Nguyen
Life of this patent
Estimating the term…
Abstract
A multi-slice processor comprising a high-level structure and history buffer. Write backs are no longer associated with the history buffer and the history buffer comprises slices determined by logical register allocation. The history buffer receives a register pointer entry and either releases or restores the entry with functional units comprised in the history buffer.
Claims20
A system comprising:
- a computer readable storage medium storing instructions;
- a processor communicatively coupled to the computer readable storage medium, the processor comprising:
- a history buffer communicatively coupled to a working mapper, wherein the history buffer comprises two or more slices;
- wherein respective slices are organized by logical register (LREG) grouping, wherein each slice comprises a set of LREG groupings, wherein each LREG grouping comprising a plurality of entries, each entry storing information in a pre-completion state;
- wherein each slice of the history buffer comprises an age array, wherein the age array is configured to determine a relative age between respective LREG groupings for each slice of the history buffer;
- and
- wherein the history buffer further comprises a restore, wherein the restore is organized by LREG.
4 more elements
A history buffer comprising:
- an active communication connection to a working mapper;
- two or more slices, wherein respective slices are organized by logical register (LREG) grouping, wherein each slice comprises a set of LREG groupings, wherein each LREG grouping comprising a plurality of entries, each entry storing information in a pre-completion state;
- wherein each slice of the history buffer comprises an age array, wherein the age array is configured to determine a relative age between respective LREG groupings for each slice of the history buffer;
- and
- at least one restore, wherein respective restores are organized by LREG.
2 more elements
A method comprising:
- implementing a data processing application by executing a set of computer readable instructions by a processor, the processor comprising a history buffer communicating with a working mapper;
- wherein the history buffer comprises two or more slices, wherein respective slices are organized by logical register (LREG) grouping, each slice comprising a set of LREG groupings, each LREG grouping comprising a plurality of entries, each entry storing information in a pre-completion state;
- wherein each slice of the history buffer comprises an age array, wherein the age array is configured to determine a relative age between respective LREG groupings for each slice of the history buffer;
- and
- wherein the history buffer further comprises at least one restore, wherein respective restores are organized by LREG;
- and
- presenting an output to a user interface in response to implementing the data processing application.
4 more elements
Dependencies are inferred from the claim text.