Method and apparatus for virtualizing the micro-op cache

A method comprising:

• storing a first instruction in a first entry of an instruction cache, wherein the first instruction is addressable by a first address;
• fetching, by a fetch unit, the first instruction from the instruction cache;
• decoding, by a decode unit, the first instruction into one or more first micro-operations;
• storing the one or more first micro-operations in a micro-operation cache;
• writing the one or more first micro-operations to the instruction cache responsive to the one or more first micro-operations being evicted from the micro-operation cache;
• retrieving, via the fetch unit, the one or more first micro-operations instead of the first instruction from the instruction cache, responsive to initiating a fetch, via the fetch unit, of the first instruction.

A system comprising:

• a memory;
• a processor coupled to the memory;
• wherein the processor is configured to:
• store a first instruction in a first entry of an instruction cache, wherein the first entry is addressable by a first address;
• fetch, by a fetch unit, the first instruction from the instruction cache;
• decode the first instruction into one or more first micro-operations;
• write the one or more first micro-operations to the instruction cache responsive to the one or more first micro-operations being evicted from a micro-operation cache;
• retrieve, via the fetch unit, the one or more first micro-operations instead of the first instruction from the instruction cache, responsive to initiating a fetch, via the fetch unit, of the first instruction.