Memory system
AssigneeToshiba Memory Corporation
InventorsHiroya Shirakura, Kyoko Shoji, Shinya Takeda
Life of this patent
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AssigneeToshiba Memory Corporation
InventorsHiroya Shirakura, Kyoko Shoji, Shinya Takeda
Estimating the term…
A memory system includes a controller and a non-volatile memory device. The controller is connectable to a host device by a bus conforming to a serial peripheral interface (SPI) standard, and configured to recognize a command signal that is received over the bus immediately after a chip select signal is received over the bus. The non-volatile memory device stores first information indicating a data size, second information indicating a manufacturer ID, third information indicating a device ID, and fourth information. The controller, upon recognizing that the command signal is an identification (ID) read command, outputs to the host device, response information that has the data size indicated by the first information and includes any one of: (i) the second information and the third information, and (ii) the second information, the third information, and the fourth information.
A memory system comprising:
A method of accessing identification information in a memory system comprising a controller connected to a host device via a first bus conforming to a serial peripheral interface (SPI) standard and a non-volatile memory device connected to the controller via a second bus, the method comprising:
A memory system comprising:
Dependencies are inferred from the claim text.