Data reading method, storage controller and storage device for optimizing read voltages

A storage controller configured for controlling a storage device disposed with a rewritable non-volatile memory module, comprising:

• a memory interface control circuit, configured to couple to the rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of word lines, and each of the plurality of word lines is coupled to a plurality of memory cells;
• a read voltage management unit;
• and
• a processor, coupled to the memory interface control circuit and the read voltage management unit, wherein the processor selects a target word line from the plurality of word lines and instructs the read voltage management unit to perform a read voltage optimization operation corresponding to the target word line, wherein in the read voltage optimization operation,
• the read voltage management unit is configured to use X read voltage sets to read the target word line among the plurality of word lines, so as to obtain X read results, wherein a plurality of target memory cells among the plurality of memory cells correspond to the target word line, and all of the plurality of target memory cells are programmed, wherein the X read voltage sets are sorted in a first order according to an average voltage value of each of the X read voltage sets, wherein a difference value of an average voltage value of an (i+1)th read voltage set among the X read voltage sets subtracted by an average voltage value of an ith read voltage set is a positive predetermined voltage offset value, wherein each of the X read voltage sets has (N−1) read voltages sorted in a second order, wherein X is a first predetermined positive integer, i is a positive integer ranging from 1 to X, i is initially set to 1, and N is a second predetermined positive integer greater than 2;
• wherein the read voltage management unit is further configured according to the first order, update a final Gray code index of each of the plurality of target memory cells and obtain (X−1) abnormal Gray code count sets according to the X read results, wherein an ith read result among the X read results comprises a Gray code corresponding to the ith read voltage set of each of the plurality of target memory cells, and the Gray code corresponds to one of N Gray code indexes,
• wherein the read voltage management unit is further configured to select (N−1) read voltages from (X−1)*(N−1) read voltages of the corresponding (X−1) read voltage sets according to the obtained (X−1) abnormal Gray code count sets to form an optimized read voltage set.

A storage device, comprising:

• a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of word lines, and each of the plurality of word lines is coupled to a plurality of memory cells;
• a memory interface control circuit, configured to couple to the rewritable non-volatile memory module, and
• a processor, coupled to the memory interface control circuit, wherein the processor loads and executes a read voltage management program code module to perform a read voltage optimization operation, wherein the read voltage optimization operation comprises the following steps:
• using X read voltage sets to read a target word line among the plurality of word lines, so as to obtain X read results, wherein a plurality of target memory cells among the plurality of memory cells correspond to the target word line, and all of the target plurality of memory cells are programmed, wherein the X read voltage sets are sorted in a first order according to an average voltage value of each of the X read voltage sets, wherein a difference value of an average voltage value of an (i+l)th read voltage set among the X read voltage sets subtracted by an average voltage value of an ith read voltage set is a positive predetermined voltage offset value, wherein each of the X read voltage sets has (N−1) read voltages are arranged according to a second order, wherein X is a first predetermined positive integer, i is a positive integer ranging from 1 to X, i is initially set to 1, and N is a second predetermined positive integer greater than 2;
• in the first order, updating a final Gray code index of each of the plurality of target memory cells and obtaining (X−1) abnormal Gray code count sets according to the X read results, wherein an ith read result among the X read results comprises a Gray code corresponding to the ith read voltage set of each of the plurality of target memory cells, and the Gray code corresponds to one of N Gray code indexes;
• and
• selecting (N−1) read voltages from (X−1)*(N−1) read voltages of the corresponding (X−1) read voltage sets according to the obtained (X−1) abnormal Gray code count sets to form an optimized read voltage set.