Trim command recording method, memory control circuit unit and memory storage device
AssigneePhison Electronics Corp.
InventorKok-Yong Tan
Life of this patent
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Abstract
A trim command recording method, a memory control circuit unit and a memory storage device are provided. The method includes: receiving a write command from a host system; writing a data corresponding to the write command to a first physical programming unit of a first physical erasing unit in the plurality of physical erasing units; and when receiving a trim command from the host system, writing a trim command record corresponding to the trim command into a second physical programming unit of the first physical erasing unit.
Claims15
A trim command recording method for a memory storage device, the memory storage device having a rewritable non-volatile memory module, the rewritable non-volatile memory module comprising a plurality of physical erasing units, each of the plurality of physical erasing units comprising a plurality of physical programming units, the trim command recording method comprising:
- receiving a write command from a host system;
- writing a data corresponding to the write command to a first physical programming unit of a first physical erasing unit of the plurality of physical erasing units;
- and
- writing a trim command record corresponding to the trim command to a second physical programming unit of the first physical erasing unit in response to a trim command from the host system, wherein a first logical address and a mapping relationship between the first logical address and a physical address mapping to the first logical address are recorded in the trim command record and the trim command indicates data stored at the first logical address has been deleted.
A memory control circuit unit comprising:
- a host interface coupled to a host system;
- a memory interface coupled to a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical erasing units, each of the plurality of physical erasing units comprises a plurality of physical programming units;
- and
- a memory management circuit coupled to the host interface and the memory interface,
- wherein the memory management circuit is configured to receive a write command from the host system,
- wherein the memory management circuit is further configured to write a data corresponding to the write command to a first physical programming unit of a first physical erasing unit of the plurality of physical erasing units,
- wherein the memory management circuit is further configured to write a trim command record corresponding to the trim command to a second physical programming unit of the first physical erasing unit in response to a trim command from the host system, wherein a first logical address and a mapping relationship between the first logical address and a physical address mapping to the first logical address are recorded in the trim command record and the trim command indicates data stored at the first logical address has been deleted.
A memory storage device comprising:
- a connecting interface unit coupled to a host system;
- a rewritable non-volatile memory module having a plurality of physical erasing units, each of the plurality of physical erasing units comprising a plurality of physical programming units;
- and
- a memory control circuit unit coupled to the connecting interface unit and the rewritable non-volatile memory module,
- wherein the memory control circuit unit is configured to receive a write command from the host system,
- wherein the memory control circuit unit is further configured to write a data corresponding to the write command to a first physical programming unit of a first physical erasing unit of the plurality of physical erasing units,
- wherein the memory control circuit unit is further configured to write a trim command record corresponding to the trim command to a second physical programming unit of the first physical erasing unit in response to a trim command from the host system, wherein a first logical address and a mapping relationship between the first logical address and a physical address mapping to the first logical address are recorded in the trim command record and the trim command indicates data stored at the first logical address has been deleted.
Dependencies are inferred from the claim text.