Back to results
US 10,884,626 B2Granted
Translation lookaside buffer in a switch
AssigneeMicron Technology, Inc.
InventorsJohn D. Leidel, Richard C. Murphy
Life of this patent
Estimating the term…
Abstract
Examples of the present disclosure provide apparatuses and methods related to a translation lookaside buffer in memory. An example method comprises receiving a command including a virtual address from a host translating the virtual address to a physical address on volatile memory of a memory device using a translation lookaside buffer (TLB).
Claims13
An apparatus, comprising:
- a number of memory devices including a number of vaults, each of the number of vaults including a partition of memory from each of the number of memory devices;
- and
- a logic base on which the number of memory devices are stacked, the logic base including:
- a switch configured to provide availability of collective bandwidth from the number of vaults;
- and
- a translation lookaside buffer (TLB) located on the switch;
- the logic base is configured to perform, in response to receipt of a command including a virtual address, a virtual address to physical address translation to translate the virtual address to a physical address in one of the number of memory vaults using the TLB, wherein a physical address corresponding to the virtual address is searched only in the TLB.
4 more elements
An apparatus, comprising:
- a number of memory devices including a number of vaults;
- and
- a logic base on which the number of memory devices are stacked, the logic base including:
- a switch configured to provide availability of collective bandwidth from the number of vaults;
- a translation lookaside buffer (TLB) located on the switch;
- and
- a number of vault controllers, each of the number of vault controllers coupled to a corresponding one of the number of vaults, and wherein each of the number of vault controllers is configured to perform, in response to receipt of a command including a number of virtual addresses, a virtual address to physical address translation to translate the number of virtual addresses of a command to a number of physical addresses in the number of memory devices using the TLB, wherein a physical address corresponding to at least one of the number of virtual addresses is searched only in the TLB.
4 more elements
Dependencies are inferred from the claim text.