Wafer-level package with enhanced performance and manufacturing method thereof

A method comprising:

• providing a mold wafer having a first die and a first mold compound, wherein:
• the first die comprises a first device layer, a first dielectric layer over the first device layer, and a first silicon substrate over the first dielectric layer, wherein the first device layer comprises a plurality of first die contacts at a bottom surface of the first device layer;
• and
• the first mold compound encapsulates sides of the first die, wherein the bottom surface of the first device layer and a top surface of the first silicon substrate are exposed from the first mold compound;
• forming a multilayer redistribution structure underneath the mold wafer, wherein:
• the multilayer redistribution structure comprises a plurality of package contacts on a bottom surface of the multilayer redistribution structure and redistribution interconnects that connect the plurality of first die contacts to certain ones of the plurality of package contacts;
• the multilayer redistribution structure is free of glass fiber;
• and
• connections between the redistribution interconnects and the plurality of first die contacts are solder-free;
• removing substantially the first silicon substrate of the first die to provide a first thinned die and form a first opening within the first mold compound and over the first thinned die, wherein the first thinned die has a top surface exposed at a bottom of the opening;
• and
• applying a second mold compound to substantially fill the opening and directly contact the top surface of the first thinned die.