Through silicon interposer wafer and method of manufacturing the same
AssigneeAgency for Science, Technology and Research
InventorsNavab Singh, Daw Don Cheam
Life of this patent
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Abstract
A through silicon interposer wafer and method of manufacturing the same. A through silicon interposer wafer having at least one cavity formed therein for MEMS applications and a method of manufacturing the same are provided. The through silicon interposer wafer includes one or more filled silicon vias formed sufficiently proximate to the at least one cavity to provide support for walls of the at least one cavity during subsequent processing of the interposer wafer.
Claims25
A through silicon interposer wafer having at least one cavity formed therein for MEMS applications, the interposer wafer comprising one or more filled silicon vias proximate to the at least one cavity, the one or more silicon vias framing the at least one cavity by defining walls of the cavity on all vertical sides and providing support for the walls of the at least one cavity during subsequent processing of the interposer wafer, wherein the one or more filled silicon vias are filled with a material, the material comprising a first conductive material and a second conductive material, the first and second conductive materials separated by a first dielectric material.
A method of manufacturing a through silicon interposer wafer having at least one cavity formed therein for MEMS applications, the method comprising:
- forming one or more silicon vias in the interposer wafer;
- thereafter forming the at least one cavity within the interposer wafer proximate to at least one of the one or more silicon vias, and
- filling the one ore more silicon vias with a material to provide support for walls of the at least one cavity during formation and subsequent processing of the interposer wafer, wherein the at least one of the one or more silicon vias frame the at least one cavity by defining walls of the cavity on all vertical sides and provide support for the walls of the at least one cavity during formation and subsequent processing of the interposer wafer, and
- wherein filling the one ore more silicon vias with the material comprises
- depositing a first conductive material on the interposer wafer and within the one or more silicon vias;
- forming a first dielectric material on the first conductive material;
- and
- depositing a second conductive material on the first dielectric material.
Dependencies are inferred from the claim text.