US 10,877,729 B2 · Reconfigurable segmented scalable shifter

Abstract

Systems and methods that provide reconfigurable shifter configurations supporting multiple instruction, multiple data (MIMD) are described. Shifters implemented according to embodiments support multiple data shifts with respect to an instance of data shifting, wherein multiple individual different data shifts are implemented at a time in parallel. Reconfigurable segmented scalable shifters of embodiments, in addition being reconfigurable for scalability in supporting data shifting with respect to various bit lengths of data, are configured to support data shifting of differing bit lengths in parallel. The data shifters of embodiments implement segmentation for facilitating data shifting with respect to differing bit lengths. Different data shift commands may be provided with respect to each such segment, thereby facilitating multiple data shifts in parallel with respect to various bit lengths of data. Reconfigurable segmented scalable shifter configurations provide for fully reconfigurable data width and shift command of each message of input data.

Claims34

Dependent claims

A reconfigurable segmented scalable shifter comprising:

a shifter stage having N-bit data input, N-bit data output, and control signal input, wherein the shifter stage is configured to implement different data shifts for multiple data segments of the N-bit data input in parallel in response to a plurality of individual shifting commands of a control signal, and
a controller coupled to the control signal input of the shifter stage, wherein the controller is configured to provide the plurality of individual shifting commands to the shifter stage, wherein each shifting command of the plurality of individual shifting commands implements a different data shift of the different data shifts for the multiple data segments of the N-bit data input, and wherein the different data shifts implemented by the shifter stage in accordance with the plurality of individual shifting commands provide shifted N-bit data at the N-bit data output having the different data shifts for the multiple data segments.

A system comprising:

a shifter stage having N-bit data input, N-bit data output, control signal input, a right shift portion, and a left shift portion, wherein the shifter stage is configured to implement different data shifts for multiple data segments of the N-bit data input in parallel in response to a plurality of individual shifting commands of a control signal,
an N-bit data input stage coupled to the N-bit data input of the shifter stage, wherein the N-bit data input stage is configured to provide N-bit input data comprising the multiple data segments to both the right shift portion and the left shift portion of the shifter stage;
an N-bit data output stage coupled to the N-bit data output of the shifter stage, wherein the N-bit data output stage is configured to select data for output based upon data shifting types of the different data shifts;
and
a controller coupled to the control signal input of the shifter stage, wherein the controller is configured to provide the plurality of individual shifting commands to the shifter stage, wherein each shifting command of the plurality of individual shifting commands implements a different data shift of the different data shifts for the multiple data segments of the N-bit data input, and wherein the different data shifts implemented by the shifter stage in accordance with the plurality of individual shifting commands provide shifted N-bit data at the N-bit data output having the different data shifts for the multiple data segments.

2 more elements

Dependencies are inferred from the claim text.

Reconfigurable segmented scalable shifter

Life of this patent

Reconfigurable segmented scalable shifter

Life of this patent

Abstract

Claims34