# US 10,873,320 B2 · Methods and apparatus for reducing filter delay > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,873,320 B2 - Document ID: US10873320B2 - Status: Granted - Kind: B2 - Application number: 16/395,787 - Filed: 2019-04-26 - Published: 2020-10-29 - Granted: 2020-12-22 - Earliest claimed: 2019-04-26 - Assignees: Allegro MicroSystems, LLC - Applicants: Allegro MicroSystems, LLC - Inventors: Roman Procházka - Web page: https://patentgrep.com/patent/US10873320B2 ## CPC - G01R 33/075: {Hall devices configured for spinning current measurements} - H03H 11/04: Frequency selective two-port networks - G01R 33/0029: {Treating the measured signals, e.g. removing offset or noise} - G01R 33/02: Measuring direction or magnitude of magnetic fields or magnetic flux (G01R33/20 takes precedence) - G01R 33/09: Magnetoresistive devices - H03H 19/004: {Switched capacitor networks} - H03H 2011/0488: {Notch or bandstop filters} - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) - H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P) ## Abstract A filter circuit includes a filter having an input and an output at which an output of the filter is provided, a step detector coupled to receive an input signal at the input of the filter and configured to detect a predetermined step in the input signal and to assert a bypass signal in response to detection of the predetermined step. A logic circuit is responsive to the bypass signal and configured to cause the input signal to be coupled to the output of the filter without filtering when the bypass signal is asserted. ## Claims ### Claim 1 A filter circuit, comprising: a filter having an input and an output at which an output of the filter is provided; a step detector coupled to receive an input signal at the input of the filter and configured to detect a predetermined step in the input signal and to assert a bypass signal in response to detection of the predetermined step; and a logic circuit responsive to the bypass signal and configured to cause the input signal to be coupled to the output of the filter without filtering when the bypass signal is asserted. ### Claim 2 (depends on 1) The filter circuit of claim 1, wherein the filter comprises: an amplifier having at least one input and an output at which the output of the filter is provided; and a sampling capacitor selectively coupled to (a) the input of the filter through a first switch, (b) the at least one input of the amplifier through a second switch, or (c) to both the input of the filter through the first switch and to the at least one input of the amplifier through the second switch. ### Claim 3 (depends on 2) The filter circuit of claim 2, wherein the logic circuit is configured to cause the sampling capacitor to be coupled to both the input of the filter through the first switch and to the at least one input of the amplifier when the bypass signal is asserted. ### Claim 4 (depends on 2) The filter circuit of claim 2, wherein the sampling capacitor comprises a plurality of parallel coupled sampling capacitors, each selectively coupled to (a) the input of the filter through a respective first switch, (b) the at least one input of the amplifier through a respective second switch, or (c) to both the input of the filter through the respective first switch and to the at least one input of the amplifier through the respective second switch. ### Claim 5 (depends on 2) The filter circuit of claim 2, wherein the amplifier has at least two inputs, the input signal is a differential input signal, and the amplifier comprises two inputs coupled to receive the differential input signal. ### Claim 6 (depends on 1) The filter circuit of claim 1, wherein the predetermined step in the input signal is detected when a change in the input signal is greater than a predetermined threshold. ### Claim 7 (depends on 6) The filter circuit of claim 6, wherein the step detector comprises a comparator having a first input coupled to receive the input signal, a second input coupled to receive the predetermined threshold, and an output at which the bypass signal is provided based on evaluation of a derivative of the input signal. ### Claim 8 (depends on 6) The filter circuit of claim 6, wherein the step detector comprises a comparator having a first input coupled to receive an offset version of the input signal that differs from the input signal by an offset amount, a second input coupled to receive the output of the filter, and an output at which the bypass signal is provided, wherein the offset amount corresponds to the predetermined threshold. ### Claim 9 (depends on 1) The filter circuit of claim 1, wherein the filter is an analog filter. ### Claim 10 (depends on 1) The filter circuit of claim 1, wherein the filter is a digital filter. ### Claim 11 (depends on 1) The filter circuit of claim 1, wherein the filter is a notch filter. ### Claim 12 A magnetic field sensor comprising: one or more magnetic field sensing elements configured to generate a magnetic field signal in response to a magnetic field; a front end amplifier coupled to the one or more magnetic field sensing elements and configured to amplify the magnetic field signal to generate a front end output signal; a filter circuit comprising: a filter having an input coupled to receive the front end output signal and an output at which a filter output signal is provided; a step detector coupled to receive the front end output signal and configured to detect a predetermined step in the input signal and to assert a bypass signal in response to detection of the predetermined step; and a logic circuit responsive to the bypass signal and configured to cause the front end output signal to be coupled to the output of the filter without filtering when the bypass signal is asserted; and an output circuit coupled to receive the filter output signal and having an output at which a sensor output signal is provided in response to the filter output signal. ### Claim 13 (depends on 12) The magnetic field sensor of claim 12, wherein the filter comprises: an amplifier having at least one input and an output at which the filter output signal is provided; and a sampling capacitor selectively coupled to (a) the input of the filter through a first switch, (b) the at least one input of the amplifier through a second switch, or (c) to both the input of the filter through the first switch and to the at least one input of the amplifier through the second switch. ### Claim 14 (depends on 13) The magnetic field sensor of claim 13, wherein the logic circuit is configured to cause the sampling capacitor to be coupled to both the input of the filter through the first switch and to the at least one input of the amplifier when the bypass signal is asserted. ### Claim 15 (depends on 12) The magnetic field sensor of claim 12, wherein the front end amplifier is a chopped amplifier operating a chopping frequency and wherein the filter has a notch selected to attenuate signal components at the chopping frequency. ### Claim 16 (depends on 12) The magnetic field sensor of claim 12, wherein output circuit comprises a fault detector configured to generate a fault signal in response to detection of a fault. ### Claim 17 A method comprising: receiving an input signal at an input of a filter; monitoring the input signal to detect a predetermined step change; and selectively filtering, by the filter, the input signal to generate a filter output signal when the predetermined step change in the input signal is not detected or bypassing the filter when the predetermined step change in the input signal is detected, wherein filtering comprises selectively coupling at least one sampling capacitor either to the input of the filter through a first switch or to an input of an amplifier through a second switch. ### Claim 18 (depends on 17) The method of claim 17, wherein bypassing the filter comprises charging the at least one sampling capacitor to a level of the input signal. ### Claim 19 (depends on 17) The method of claim 17, wherein monitoring the input signal comprises comparing the input signal to a predetermined threshold. ### Claim 20 (depends on 17) The method of claim 17, wherein monitoring the input signal comprises comparing the filter output signal to an offset version of the input signal. ### Claim 21 Apparatus comprising: a filter having an input and an output at which an output of the filter is provided; means, coupled to receive an input signal at the input of the filter, for detecting a predetermined step in the input signal and to assert a bypass signal in response to detection of the predetermined step; and means, responsive to the bypass signal, for coupling the input signal to the output of the filter without filtering when the bypass signal is asserted. ### Claim 22 (depends on 21) The apparatus of claim 21, wherein the filter comprises: an amplifier having at least one input and an output at which the output of the filter is provided; and a sampling capacitor selectively coupled to (a) the input of the filter through a first switch, (b) the at least one input of the amplifier through a second switch, or (c) to both the input of the filter through the first switch and to the at least one input of the amplifier through the second switch. ### Claim 23 (depends on 21) The apparatus of claim 21, wherein the detecting means comprises means for detecting when a change in the input signal is greater than a predetermined threshold.