# US 10,873,019 B2 · Topological programmable scalable quantum computing machine utilizing chord line quasi unidimensional aperature tunneling semiconductor structures

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- Number: US 10,873,019 B2
- Document ID: US10873019B2
- Status: Granted
- Kind: B2
- Application number: 16/524,259
- Filed: 2019-07-29
- Published: 2020-04-02
- Granted: 2020-12-22
- Earliest claimed: 2018-06-20
- Assignees: Equal1.Labs Inc.
- Applicants: equal1.labs Inc.
- Inventors: Dirk Robert Walter Leipold; George Adrian Maxim; Michael Albert Asker
- Web page: https://patentgrep.com/patent/US10873019B2

## CPC

- G06N 10/40: Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- G06N 10/70: Quantum error correction, detection or prevention, e.g. surface codes or magic state distillation
- H10D 30/402: {Single electron transistors; Coulomb blockade transistors}
- H10D 48/3835: {Semiconductor qubit devices comprising a plurality of quantum mechanically interacting semiconductor quantum dots, e.g. Loss-DiVincenzo spin qubits}
- H10D 62/121: {oriented parallel to substrates}
- H10D 64/27: Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D 84/0128: {Manufacturing their channels}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/83: of only insulated-gate FETs [IGFET]
- H10N 60/0912: {of Josephson-effect devices}
- H10N 60/12: Josephson-effect devices
- H10N 60/128: {having three or more electrodes, e.g. transistor-like structures}
- H10N 60/805: {for Josephson-effect devices}
- H10N 69/00: Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
- H10D 12/211: {Gated diodes}
- G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

A novel and useful topological, scalable, and reprogrammable quantum computing machine having one or more quasi-unidimensional chord lines along which the movement of a particle is constrained. The unidimensional passage has localized energy levels that can be controlled with classic electronics. The chord line has two or more quantum dots between which a quasi-unidimensional channel is formed for the particle to travel from one qdot to the other. The tunneling path may be polysilicon, metal, thin oxide, or induced depletion region. The chord line can be in a two-dimensional space for a planar process or in a three-dimensional space with multiple layers of signal processing for a three dimensional process. A quantum structure has semiconductor dots with a layer that provides the chord line for the quantum particle evolution to occur from one dot to the other. The various layers may include polysilicon, metal, thin oxide, or induced depletion region either fully overlapped or partially overlapped.

## Claims

### Claim 1

A quantum structure, comprising:
a substrate;
a substantially undoped layer fabricated over said substrate and adapted to contain a first quantum dot and a second quantum dot separated from each other;
a tunneling path fabricated between and connecting said first quantum dot and said second quantum dot;
a control gate in proximity of said tunneling path and operative to separate said first quantum dot from said second quantum dot;
wherein a potential applied to said control gate is operative to control tunneling of a quantum particle through said tunneling path connecting said first quantum dot and said second quantum dot; and
wherein said tunneling path and said control gate are operative to yield a sufficiently narrow aperture chord line resulting in quasi-unidimensional quantum operation.

### Claim 2 (depends on 1)

The quantum structure according to claim 1, wherein said tunneling path is selected from a group comprising polysilicon, metal, oxide, and depletion well.

### Claim 3 (depends on 1)

The quantum structure according to claim 1, wherein said first quantum dot, said second quantum dot, said tunneling path, and said control gate are constructed using a planar process configuration.

### Claim 4 (depends on 1)

The quantum structure according to claim 1, wherein said first quantum dot, said second quantum dot, said tunneling path, and said control gate are constructed using a 3D process configuration.

### Claim 5 (depends on 1)

The quantum structure according to claim 1, wherein said substrate is selected from a group comprising a semiconductor, silicon on insulator (SOI), and insulating substrate replacement.

### Claim 6 (depends on 1)

The quantum structure according to claim 1, wherein said first quantum dot and said second quantum dot have a shape selected from a group comprising a circle, an ellipse, a square, a rectangle, a trapezoid, two squares diagonally connected at their corners, two rectangles diagonally connected at their corners, two squares overlapping at their corners, two rectangles overlapping at their corners, two squares connected at their corners to a third smaller square, two squares connected at their corners to a smaller double square, two rectangles connected at their corners to a third smaller square, two rectangles connected at their corners to a smaller double square, two diagonally overlapping squares connected at a corner to another two diagonally overlapping squares, two diagonally overlapping rectangles connected at a corner to another two diagonally overlapping rectangles, and any combination thereof.

### Claim 7 (depends on 1)

The quantum structure according to claim 1, wherein said control gate is selected from a group comprising a contacted control gate directly driven by an electronic signal, metal gate or semiconductor well imposed floating control gate utilizing adjacent or overlapping positioning, and a floating control gate with an imposing adjacent gate potential.

### Claim 8

A method of fabricating a quantum structure, comprising:
providing a substrate material;
fabricating a substantially undoped layer over said substrate material to form a first quantum dot and a second quantum dot;
fabricating a tunneling path operative to connect said first quantum dot and said second quantum dot;
fabricating a control gate in proximity of said tunneling path;
applying a potential to said control gate to control tunneling of a quantum particle through said tunneling path connecting said first quantum dot and said second quantum dot; and
wherein said tunneling path and said control gate are operative to yield a sufficiently narrow aperture chord line resulting in quasi-unidimensional quantum operation.

### Claim 9

A quantum structure, comprising:
a substrate;
a plurality of quantum dots fabricated on a substantially undoped layer fabricated over said substrate, each pair of quantum dots including:
a tunneling path connecting a pair of quantum dots;
a control gate operative to control said tunneling path;
wherein each pair of quantum dots is configured to provide a quasi-unidimensional channel for quantum particle travel therebetween; and
wherein said plurality of quantum dots are arranged to form a chord line operative to define a path for a quantum particle.

### Claim 10 (depends on 9)

The quantum structure according to claim 9, wherein said chord line comprises a substantially narrow channel over which said quantum particle is permitted to evolve within said quantum structure and over which one or more quantum operations occur.

### Claim 11 (depends on 9)

The quantum structure according to claim 9, further comprising one or more bifurcations in said chord line thereby creating a plurality of paths for the quantum particle.

### Claim 12 (depends on 9)

The quantum structure according to claim 9, wherein said chord line is fabricated in a two dimensional space using a planar semiconductor process.

### Claim 13 (depends on 9)

The quantum structure according to claim 9, wherein said chord line is fabricated in a three dimensional space using a 3D semiconductor process.

### Claim 14 (depends on 9)

The quantum structure according to claim 9, wherein said tunneling path is selected from a group comprising polysilicon, metal, oxide, and depleted well.

### Claim 15

A topological quantum computing machine, comprising:
one or more quantum cores;
each quantum core including a plurality of chord lines incorporating a plurality of quantum dots in 2D and/or 3D space and operative to define one or more paths for a quantum particle;
each chord line includes a plurality of quantum dots each pair of which is connected by a tunneling path controlled by a control gate, wherein each pair of quantum dots configured to provide a quasi-unidimensional channel for quantum particle travel therebetween; and
wherein said plurality of chord lines within said one or more quantum cores are configured to enable evolution of one or more quantum particles over said plurality of chord lines to perform one or more quantum operations.

### Claim 16 (depends on 15)

The topological quantum computing machine according to claim 15, wherein said one or more chord lines are configured to be programmable via one or more control signals.

### Claim 17 (depends on 15)

The topological quantum computing machine according to claim 15, wherein said one or more chord lines are configured to be scalable.

### Claim 18 (depends on 15)

The topological quantum structure according to claim 15, wherein said tunneling path is selected from a group comprising polysilicon, metal, oxide, and semiconductor well.