# US 10,872,982 B2 · Semiconductor device and method for manufacturing the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,872,982 B2
- Document ID: US10872982B2
- Status: Granted
- Kind: B2
- Application number: 15/045,298
- Filed: 2016-02-17
- Published: 2016-06-09
- Granted: 2020-12-22
- Earliest claimed: 2012-02-28
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy laboratory Co., Ltd.
- Inventors: Shinji Ohno; Hirokazu Watanabe; Naoto Kusumoto
- Web page: https://patentgrep.com/patent/US10872982B2

## CPC

- H10D 30/6756: {Amorphous oxide semiconductors}
- H10D 30/031: {of thin-film transistors [TFT]}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 62/402: {Amorphous materials}
- H10D 62/80: characterised by the materials
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10P 30/202: {characterised by the semiconductor materials}
- H10P 30/208: {of electrically inactive species}
- H10P 30/21: {of electrically active species}
- H10P 30/22: using masks
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A transistor excellent in electrical characteristics and a method for manufacturing the transistor are provided. The transistor includes an oxide semiconductor layer including a source region, a drain region, and a channel formation region over an insulating surface; a gate insulating film over the oxide semiconductor layer; a gate electrode overlapping with the channel formation region, over the gate insulating film; a source electrode in contact with the source region; and a drain electrode in contact with the drain region. The source region and the drain region include a portion having higher oxygen concentration than the channel formation region.

## Claims

### Claim 1

A method for manufacturing a semiconductor device with a single-gate transistor, comprising the steps of:
forming an oxide semiconductor layer containing indium and zinc over an insulating surface;
forming a source electrode and a drain electrode in contact with part of the oxide semiconductor layer;
forming a gate insulating film over the oxide semiconductor layer, the source electrode, and the drain electrode; and
adding oxygen to the oxide semiconductor layer in a region that does not overlap with the source electrode and the drain electrode after the formation of the gate insulating film, wherein the oxygen is added by an ion implantation method, an ion doping method or a plasma immersion ion implantation method.

### Claim 2 (depends on 1)

The method for manufacturing the semiconductor device according to claim 1,
wherein the oxide semiconductor layer is formed by a sputtering method, a molecular beam epitaxy method, a CVD method, a pulse laser deposition method, or an atomic layer deposition method.

### Claim 3

A method for manufacturing a semiconductor device with a single-gate transistor, comprising the steps of:
forming an oxide semiconductor layer containing indium and zinc over an insulating surface;
forming an electrode in contact with part of the oxide semiconductor layer;
forming a silicon oxynitride film over the oxide semiconductor layer and the electrode; and
adding oxygen to the oxide semiconductor layer in a region that does not overlap with the electrode after the formation of the silicon oxynitride film, wherein the oxygen is added by an ion implantation method, an ion doping method or a plasma immersion ion implantation method.

### Claim 4 (depends on 3)

The method for manufacturing the semiconductor device according to claim 3,
wherein the oxide semiconductor layer is formed by a sputtering method, a molecular beam epitaxy method, a CVD method, a pulse laser deposition method, or an atomic layer deposition method.