# US 10,872,973 B2 · Semiconductor structures with two-dimensional materials

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- Number: US 10,872,973 B2
- Document ID: US10872973B2
- Status: Granted
- Kind: B2
- Application number: 16/236,004
- Filed: 2018-12-28
- Published: 2020-01-02
- Granted: 2020-12-22
- Earliest claimed: 2018-06-28
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.; National Taiwan University
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.; National Taiwan University
- Inventors: Shih-Yen Lin; Hsuan-An Chen
- Web page: https://patentgrep.com/patent/US10872973B2

## CPC

- H10D 48/362: {Unipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions, e.g. hot electron transistors [HET], metal base transistors [MBT], resonant tunnelling transistors [RTT], bulk barrier transistors [BBT], planar doped barrier transistors [PDBT] or charge injection transistors [CHINT]}
- H10D 30/47: having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D 62/80: characterised by the materials
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10P 14/22: using physical deposition, e.g. vacuum deposition or sputtering
- H10P 14/271: {characterised by the preparation of substrate for selective deposition}
- H10P 14/274: {using seed materials}
- H10P 14/3236: {being chalcogenide semiconducting materials not being oxides, e.g. ternary compounds}
- H10P 14/3246: {Monolayers}
- H10P 14/3402: {characterised by the chemical composition}
- H10P 14/3436: {being chalcogenide semiconductor materials not being oxides, e.g. ternary compounds}
- H10P 14/3452: {Microstructure}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

The current disclosure describes semiconductor devices, e.g., transistors, including a substrate, a semiconductor region including, at the surface, monolayer MoS2 and/or other monolayer material over the substrate, and a terminal structure over the semiconductor region, which includes a different monolayer material grown directly over the semiconductor region.

## Claims

### Claim 1

A method, comprising:
receiving a wafer including a substrate and a first layer of a first two-dimensional material over the substrate;
forming a first pattern of the first two-dimensional material by patterning the first layer; and
selectively forming a second layer of a second two-dimensional material over the first pattern, the second layer of the second two-dimensional material overlapping only the first pattern.

### Claim 2 (depends on 1)

The method of claim 1, further comprising thinning the first layer of the first two-dimensional material such that the first layer of the first two-dimensional material exhibits a semiconductor property.

### Claim 3 (depends on 2)

The method of claim 2, further comprising heating the substrate and the first pattern of the first two dimensional material before forming the second layer of the second two-dimensional material.

### Claim 4 (depends on 1)

The method of claim 1, wherein the first two-dimensional material is a transition metal dichalcogenide (TMD) material.

### Claim 5 (depends on 1)

The method of claim 1, wherein the first two-dimensional material exhibits a semiconductor property.

### Claim 6 (depends on 1)

The method of claim 1, wherein the first two-dimensional material is molybdenum disulfide with a thickness ranging from about two monolayers of two-dimensional molybdenum disulfide to about six monolayers of two-dimensional molybdenum disulfide.

### Claim 7 (depends on 1)

The method of claim 1, wherein the selectively forming the second layer of the second two-dimensional material over the first pattern includes growing the second two-dimensional material globally over the wafer with a growth condition that prevents the second two-dimensional material from bonding to a surface of the wafer outside the first pattern.

### Claim 8 (depends on 7)

The method of claim 7, wherein the second two-dimensional material is antimonene and the growth condition includes a growth temperature higher than 150° C.

### Claim 9

A method, comprising:
receiving a wafer including a substrate and a first layer of a first two-dimensional material over the substrate;
forming a first pattern of the first two-dimensional material by patterning the first layer of the first two-dimensional material, the first pattern of the first two-dimensional material exhibiting a semiconductor property;
forming a second layer of a second two-dimensional material over the first pattern of the first two-dimensional material, the second layer of the second two-dimensional material having sidewalls that are coterminous with sidewalls of the first pattern;
forming a conductive layer over the second layer of the second two-dimensional material;
patterning the conductive layer and the second layer of the second two-dimensional material to form a source structure and a drain structure and an exposed portion of the first pattern between the source structure and the drain structure; and
forming a gate structure over the exposed portion of the first pattern.

### Claim 10 (depends on 9)

The method of claim 9, further comprising treating the second layer of the second two-dimensional material such that the second layer exhibits a semimetal property.

### Claim 11 (depends on 9)

The method of claim 9, wherein the first two-dimensional material is molybdenum disulfide.

### Claim 12 (depends on 9)

The method of claim 9, wherein the second two-dimensional material is antimonene.

### Claim 13 (depends on 9)

The method of claim 9, further comprising annealing the second layer of the second two-dimensional material.

### Claim 14 (depends on 13)

The method of claim 13, wherein the annealing is conducted after the conductive layer is formed.

### Claim 15 (depends on 9)

The method of claim 9, further comprising reducing a thickness of the first layer of the first two-dimensional material.

### Claim 16 (depends on 1)

The method of claim 1, wherein the second-two dimensional material exhibits a semimetal property.

### Claim 17 (depends on 8)

The method of claim 8, wherein the second two-dimensional material is a β allotrope of antimonene.

### Claim 18 (depends on 1)

The method of claim 1, further comprising forming a conductive layer over the second two-dimensional material.

### Claim 19 (depends on 18)

The method of claim 18, further comprising patterning the conductive layer and the second two-dimensional material together to form a source/drain structure.

### Claim 20 (depends on 12)

The method of claim 12, wherein the second two-dimensional material is a β allotrope of antimonene.