Quantum dot circuit and a method of characterizing such a circuit

A quantum dot circuit for forming a first potential well and a second potential well that succeeds the first potential well in a channel, comprising

• the channel;
• first gate electrodes that extend over first locations along the edge of the channel for creating potential barriers next to the potential wells;
• second gate electrodes that extend over successive second locations along the edge of the channel, for controlling depths of the first and second potential wells in the channel, said second gate electrodes each lying between a respective pair of the first gate electrodes;
• a controllable bias voltage generation circuit with first outputs coupled to the first gate electrodes and second outputs coupled to the second gate electrodes;
• a calibration circuit configured to, under control of execution of a program in a computer,
• cause the bias voltage generation circuit to perform a pre-scan of first bias voltages of the first gate electrodes at consecutive ones of the first locations over a first two-dimensional range of combinations of said first bias voltages;
• read measurements of a current through the channel from the current detector during the pre-scan, the measurements resulting in a first two-dimensional image that has the bias voltages of the respective ones of the pair of consecutive first gate electrodes as x and y coordinates and measured channel currents as image values at combinations of the bias voltages of the respective ones of the pair of consecutive first gate electrodes;
• compute results of applying a two dimensional filtering operation to the two-dimensional image, wherein said two dimensional filtering operation has a first image frequency pass band with a bandwidth for sums of the voltages in the combinations of the first bias voltages of the first gate electrodes at the consecutive ones of the first locations, and a second image frequency pass band with a bandwidth for differences of the voltages in the combinations of the first bias voltages of the first gate electrodes at the consecutive ones of the first locations, the second image frequency bandwidth being narrower than the first image frequency bandwidth;
• select one of the combinations of the first bias voltages the first gate electrodes at consecutive ones of the first locations at which the results produce a maximum filter operation output value,
• cause the bias voltage generation circuit to perform a scan comprising scanning second bias voltages applied to respective ones of the second gate electrodes that extend over consecutive ones of the second locations over a two-dimensional range of combinations of said second bias voltages, while applying the selected one of the combinations of the first bias voltages of the first gate electrodes at the consecutive ones of the first locations;
• obtain measured charge carrier occupations of the first and second potential wells at consecutive positions along the channel during said scan.

A method of automatic characterization of a quantum dot circuit for forming a first potential well and a second potential well in a channel, using first gate electrodes that extend over first locations along an edge of the channel for creating potential barriers next to the first and second potential wells, and second electrodes that extend over second locations along the edge of the channel adjacent to the first and second potential wells for controlling depths of the first and second potential wells in the channel, the second gate electrodes each lying between a respective pair of the first gate electrodes, the method comprising

• simulating operation of the quantum dot circuit;
• computing directions of lines of combinations of the voltages of the second gate electrodes which result in equal lowest potential values in the first and second potential wells next to the second gate electrodes that extend over the consecutive ones of the second locations adjacent to the potential wells, during said simulating;
• performing a scan over combinations of bias voltages applied to gate electrodes that extend over consecutive ones of the second locations, the scan being performed over a two-dimensional range of combinations of said bias voltages
• measuring a charge carrier occupation of the first and second potential wells at consecutive positions along the channel during said scan;
• detecting an image point where a match occurs with a pattern of crossing edges along the computed directions in a two-dimensional image that has the combinations of the bias voltages as image points and the charge carrier occupation as image values.