# US 10,872,944 B2 · Display substrate, method of manufacturing display substrate, and display device including display substrate

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- Number: US 10,872,944 B2
- Document ID: US10872944B2
- Status: Granted
- Kind: B2
- Application number: 16/681,697
- Filed: 2019-11-12
- Published: 2020-05-28
- Granted: 2020-12-22
- Earliest claimed: 2018-11-26
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., Ltd.
- Inventors: Sang Gab Kim; Hyunmin Cho; Taesung Kim; Subin Bae; Yu-Gwang Jeong; Jinseock Kim
- Web page: https://patentgrep.com/patent/US10872944B2

## CPC

- H10K 59/124: Insulating layers formed between TFT elements and OLED elements
- H10K 59/123: Connection of the pixel electrodes to the thin film transistors [TFT]
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- H10K 71/00: Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10D 86/0231: {using masks, e.g. half-tone masks}
- H10K 59/1201: {Manufacture or treatment}
- H10K 71/233: {by photolithographic etching}
- H10K 2102/351: {Thickness}
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method of manufacturing a display substrate may include the following steps: forming a drain electrode on a pixel area of a substrate; forming a pad electrode on a pad area of the substrate; forming an inorganic insulation layer that covers the drain electrode and the pad electrode; forming an organic insulation member that has a first thickness at the pixel area of the substrate, has a second thickness less than the first thickness at the pad area of the substrate, exposes a first portion of the inorganic insulation layer on the drain electrode, and exposes a second portion of the inorganic insulation layer on the pad electrode; removing the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer; and partially removing the organic insulation member.

## Claims

### Claim 1

A method of manufacturing a display substrate, the method comprising:
forming a semiconductor member that overlaps a pixel area of a substrate;
forming a gate electrode that overlaps the semiconductor member;
forming a source electrode and a drain electrode that directly contact the semiconductor member;
forming a pad electrode that overlaps a pad area of the substrate;
forming an inorganic insulation layer that covers each of the source electrode, the drain electrode, and the pad electrode;
forming an organic insulation member on the inorganic insulation layer, wherein the organic insulation member has a first positive maximum thickness in a direction perpendicular to the substrate at the pixel area of the substrate, has a second positive maximum thickness in the direction perpendicular to the substrate less than the first thickness at the pad area of the substrate, exposes a first portion of the inorganic insulation layer on the drain electrode, and exposes a second portion of the inorganic insulation layer on the pad electrode;
removing the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer using an etching gas; and
partially removing the organic insulation member to form a planarization layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the source electrode, the drain electrode, and the pad electrode are simultaneously formed.

### Claim 3 (depends on 1)

The method of claim 1, wherein the pad electrode includes an intermediate layer including aluminum (Al) and includes two conductive layers respectively disposed on two opposite surfaces of the intermediate layer.

### Claim 4 (depends on 1)

The method of claim 1, wherein the inorganic insulation layer is formed of silicon nitride.

### Claim 5 (depends on 1)

The method of claim 1, wherein the organic insulation member is formed using a halftone mask.

### Claim 6 (depends on 5)

The method of claim 5, wherein forming the organic insulation member includes:
forming an organic insulation layer on the inorganic insulation layer;
exposing the organic insulation layer to a light using the halftone mask; and
partially removing the organic insulation layer.

### Claim 7 (depends on 6)

The method of claim 6, comprising:
positioning a first light transmitting portion of the halftone mask and a second light transmitting portion of the halftone mask over the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer, respectively;
positioning a light shielding portion of the halftone mask over the pixel area of the substrate, wherein the light shielding portion of the halftone mask exposes the first portion of the inorganic insulation layer; and
positioning a light transflective portion of the halftone mask over the pad area of the substrate, wherein the light transflective portion of the halftone mask exposes the second portion of the inorganic insulation layer.

### Claim 8 (depends on 1)

The method of claim 1, wherein the second portion of the inorganic insulation layer is disposed on a portion of an upper surface of the pad electrode before being removed.

### Claim 9 (depends on 1)

The method of claim 1, wherein the etching gas includes fluorine (F).

### Claim 10 (depends on 1)

The method of claim 1, wherein the organic insulation member is ashed by a thickness greater than or equal to the second positive maximum thickness and less than the first positive maximum thickness to form the planarization layer.

### Claim 11 (depends on 1)

The method of claim 1, wherein the organic insulation member is ashed by a thickness less than the second positive maximum thickness to form the planarization layer.

### Claim 12 (depends on 1)

The method of claim 1, further comprising:
forming a pixel electrode layer on the planarization layer, the pixel electrode layer being in contact with the drain electrode and the pad electrode; and
removing a portion of the pixel electrode layer that overlaps the pad area of the substrate.

### Claim 13 (depends on 12)

The method of claim 12, wherein the pixel electrode layer includes an intermediate layer including silver (Ag) and includes two conductive layers respectively disposed on two opposite surfaces of the intermediate layer.