# US 10,872,907 B2 · Semiconductor device

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- Number: US 10,872,907 B2
- Document ID: US10872907B2
- Status: Granted
- Kind: B2
- Application number: 16/689,134
- Filed: 2019-11-20
- Published: 2020-03-19
- Granted: 2020-12-22
- Earliest claimed: 2013-07-25
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Hideki Matsukura
- Web page: https://patentgrep.com/patent/US10872907B2

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- H10D 30/6729: {characterised by the electrodes}
- H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes}
- H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 84/401: {Combinations of FETs or IGBTs with BJTs}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

Two dual-gate transistors, which are electrically connected in parallel and provided in a compact design, are disclosed.

## Claims

### Claim 1

A semiconductor device comprising:
a first conductive layer;
a first insulating layer over the first conductive layer;
an oxide semiconductor layer over the first insulating layer;
a second conductive layer over the oxide semiconductor layer;
a third conductive layer over the oxide semiconductor layer;
a second insulating layer over the second conductive layer and the third conductive layer;
a fourth conductive layer over the second insulating layer;
a fifth conductive layer over the second insulating layer;
a third insulating layer over the fourth conductive layer and the fifth conductive layer; and
a sixth conductive layer over the third insulating layer,
wherein the oxide semiconductor layer includes a first channel formation region of a first transistor,
wherein the oxide semiconductor layer includes a second channel formation region of a second transistor, and
wherein the first conductive layer includes a region functioning as a first gate electrode of the first transistor and a region functioning as a second gate electrode of the second transistor.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein the second conductive layer includes a region functioning as one of a source and a drain of the first transistor and a region functioning as one of a source and a drain of the second transistor.

### Claim 3 (depends on 2)

The semiconductor device according to claim 2,
wherein the third conductive layer includes a region functioning as the other of the source and the drain of the first transistor and a region functioning as the other of the source and the drain of the second transistor.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1,
wherein the fourth conductive layer includes a region functioning as a third gate electrode of the first transistor and a region functioning as a fourth gate electrode of the second transistor.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1,
wherein the third conductive layer includes a first region in contact with the fifth conductive layer.

### Claim 6 (depends on 5)

The semiconductor device according to claim 5,
wherein the fifth conductive layer includes a second region in contact with the sixth conductive layer.

### Claim 7 (depends on 6)

The semiconductor device according to claim 6,
wherein a width of the second region is wider than the width of the first region in a cross-sectional view in a channel direction of the first and second transistors.

### Claim 8

A semiconductor device comprising:
a first conductive layer;
a first insulating layer over the first conductive layer;
an oxide semiconductor layer over the first insulating layer;
a second conductive layer over the oxide semiconductor layer;
a third conductive layer over the oxide semiconductor layer;
a second insulating layer over the second conductive layer and the third conductive layer;
a fourth conductive layer over the second insulating layer;
a fifth conductive layer over the second insulating layer;
a third insulating layer over the fourth conductive layer and the fifth conductive layer; and
a sixth conductive layer over the third insulating layer,
wherein the oxide semiconductor layer includes a first channel formation region of a first transistor,
wherein the fifth conductive layer overlaps with the first conductive layer and the sixth conductive layer,
wherein the oxide semiconductor layer includes a second channel formation region of a second transistor, and
wherein the first conductive layer includes a region functioning as a first gate electrode of the first transistor and a region functioning as a second gate electrode of the second transistor.

### Claim 9 (depends on 8)

The semiconductor device according to claim 8,
wherein the second conductive layer includes a region functioning as one of a source and a drain of the first transistor and a region functioning as one of a source and a drain of the second transistor.

### Claim 10 (depends on 9)

The semiconductor device according to claim 9,
wherein the third conductive layer includes a region functioning as the other of the source and the drain of the first transistor and a region functioning as the other of the source and the drain of the second transistor.

### Claim 11 (depends on 8)

The semiconductor device according to claim 8,
wherein the fourth conductive layer includes a region functioning as a third gate electrode of the first transistor and a region functioning as a fourth gate electrode of the second transistor.

### Claim 12 (depends on 8)

The semiconductor device according to claim 8,
wherein the third conductive layer includes a first region in contact with the fifth conductive layer.

### Claim 13 (depends on 12)

The semiconductor device according to claim 12,
wherein the fifth conductive layer includes a second region in contact with the sixth conductive layer.

### Claim 14 (depends on 13)

The semiconductor device according to claim 13,
wherein a width of the second region is wider than the width of the first region in a cross-sectional view in a channel direction of the first and second transistors.

### Claim 15

A semiconductor device comprising:
a first conductive layer;
a first insulating layer over the first conductive layer;
an oxide semiconductor layer over the first insulating layer;
a second conductive layer over the oxide semiconductor layer;
a third conductive layer over the oxide semiconductor layer;
a second insulating layer over the second conductive layer and the third conductive layer;
a fourth conductive layer over the second insulating layer;
a fifth conductive layer over the second insulating layer;
a third insulating layer over the fourth conductive layer and the fifth conductive layer; and
a sixth conductive layer over the third insulating layer,
wherein the oxide semiconductor layer includes a first channel formation region of a first transistor,
wherein the fifth conductive layer is provided between the second conductive layer in plan view,
wherein the oxide semiconductor layer includes a second channel formation region of a second transistor, and
wherein the first conductive layer includes a region functioning as a first gate electrode of the first transistor and a region functioning as a second gate electrode of the second transistor.

### Claim 16 (depends on 15)

The semiconductor device according to claim 15,
wherein the second conductive layer includes a region functioning as one of a source and a drain of the first transistor and a region functioning as one of a source and a drain of the second transistor.

### Claim 17 (depends on 16)

The semiconductor device according to claim 16,
wherein the third conductive layer includes a region functioning as the other of the source and the drain of the first transistor and a region functioning as the other of the source and the drain of the second transistor.

### Claim 18 (depends on 15)

The semiconductor device according to claim 15,
wherein the fourth conductive layer includes a region functioning as a third gate electrode of the first transistor and a region functioning as a fourth gate electrode of the second transistor.

### Claim 19 (depends on 15)

The semiconductor device according to claim 15,
wherein the third conductive layer includes a first region in contact with the fifth conductive layer.

### Claim 20 (depends on 19)

The semiconductor device according to claim 19,
wherein the fifth conductive layer includes a second region in contact with the sixth conductive layer, and
wherein a width of the second region is wider than the width of the first region in a cross-sectional view in a channel direction of the first and second transistors.
