Integrated circuit including a ferroelectric memory cell and manufacturing method thereof
AssigneeNaMLab gGmbH
InventorStefan Müller
Life of this patent
Estimating the term…
Abstract
An integrated circuit comprises a ferroelectric memory cell comprising a ferroelectric film comprising a binary oxide ferroelectric with the formula XO2 where X represents a transition metal. The ferroelectric film is a polycrystalline film having a plurality of crystal grains, wherein the crystal grains are oriented along a predetermined crystal axis, or the ferroelectric film is a monocrystalline film, wherein the ferroelectric film comprises additives promoting formation of the crystal structure of the monocrystalline film and/or wherein the memory cell comprises a crystallinity-promoting layer that is directly in contact with the ferroelectric film and promotes formation of the crystal structure of the monocrystalline film.
Claims14
An integrated circuit comprising:
- a ferroelectric memory cell comprising a ferroelectric film comprising a binary oxide ferroelectric with a formula XO2, where X represents a transition metal, wherein:
- the ferroelectric film is a polycrystalline film having crystal grains, wherein at least 50% of the crystal grains are oriented along a predetermined common crystal axis such that the orientation of a crystal axis of a crystal grain is within a cone having an aperture of less than 10 degrees, or
- the ferroelectric film is a monocrystalline ferroelectric film, wherein:
- the monocrystalline ferroelectric film includes:
- a scavenging material promoting formation of a crystal structure of the monocrystalline ferroelectric film;
- and
- a crystallinity-promoting layer between the monocrystalline ferroelectric film and an electrode, the crystallinity-promoting layer comprising a scavenger material that is directly in contact with the monocrystalline ferroelectric film and promotes formation of a crystal structure of the monocrystalline ferroelectric film, and wherein the crystallinity-promoting layer has in-plane lattice constants that have less than a 20% lattice mismatch with in-plane lattice constants of the monocrystalline ferroelectric film at an interface between the crystallinity promoting layer and the monocrystalline ferroelectric film.
A method for manufacturing an integrated circuit including a ferroelectric memory cell comprising:
- forming a polycrystalline ferroelectric film having crystal grains, wherein at least 50% of the crystal grains are oriented along a predetermined common crystal axis such that the orientation of a crystal axis of a crystal grain is within a cone having an aperture of less than 10 degrees, or a monocrystalline ferroelectric film,
- wherein each of the polycrystalline ferroelectric film and the monocrystalline ferroelectric film comprises a binary oxide ferroelectric with a formula XO2, where X represents a transition metal;
- and
- wherein the monocrystalline ferroelectric film includes a scavenging material promoting formation of a crystal structure of the monocrystalline ferroelectric film and is formed directly in contact with a crystallinity-promoting layer, interposed between the monocrystalline ferroelectric film and an electrode, including the scavenging material that promotes formation of the crystal structure of the monocrystalline ferroelectric film, and wherein the crystallinity-promoting layer has in-plane lattice constants that have less than a 20% lattice mismatch with in-plane lattice constants of the monocrystalline ferroelectric film at an interface between the crystallinity promoting layer and the monocrystalline ferroelectric film.
Dependencies are inferred from the claim text.